82 commits

Author	SHA1	Message	Date
rkx1209	2052f8e8af	Removed writeback method from Interpreter	2018-03-09 20:45:07 +09:00
rkx1209	fbc62e9664	Removed sf from Load/StoreRegImm64	2018-03-07 23:00:27 +09:00
rkx1209	adde42797b	Add support for load/store operation with 128bit register(FP)	2018-03-07 20:05:53 +09:00
rkx1209	a60f814e0c	Refactor mmu code	2018-03-05 22:20:48 +09:00
rkx1209	ad2cfdc816	Add support for load/store operation with register immediate	2018-03-05 07:18:11 +09:00
rkx1209	77e2611ca2	Add support for load/store operation with register offset	2018-03-05 04:28:03 +09:00
rkx1209	0ce05811e9	Add Memory write primitive method	2018-03-05 04:26:39 +09:00
rkx1209	305b7f9349	Add support for load literal operation	2018-02-27 17:58:50 +09:00
rkx1209	405c2a8fbe	Add support for data processing with 2 src operation	2018-02-26 19:10:45 +09:00
rkx1209	8331633c7f	Add support for data processing with 1 src operation	2018-02-26 02:58:33 +09:00
rkx1209	806ac7dabf	Add support for conditional select operation	2018-02-25 22:55:39 +09:00
rkx1209	1cf270a02e	Add support for Conditional Compare ops	2018-02-17 19:47:04 +09:00
rkx1209	ff7f05054c	Add Bit operation support and miscs	2018-02-17 14:00:14 +09:00
rkx1209	62577764bf	Add Add/Sub operation and NZCV flag	2018-02-16 19:19:28 +09:00
rkx1209	d1952b4f46	Add deposit inst and dump function	2018-02-16 16:08:28 +09:00
rkx1209	56215110d8	Fixed missaligned syntax	2018-02-15 22:41:15 +09:00
rkx1209	dbf922c851	Renamed to byteswap32 func	2018-02-15 22:38:40 +09:00
rkx1209	60267e3627	Add LogicReg and Add/SubExtReg ops support to Disassembler	2018-01-04 09:01:57 +09:00
rkx1209	a5114f2087	Add Branch and Exception ops support to Disassembler	2018-01-02 23:32:03 +09:00
rkx1209	b00aea1a31	Add Unconditional branch op support to Disassembler	2018-01-02 03:55:24 +09:00
rkx1209	da24be5562	Add disassembler for all data proc imm operations	2018-01-01 04:18:56 +09:00
rkx1209	713b1e0818	Changed tab size	2017-12-31 18:20:26 +09:00
rkx1209	403560c766	Add Initial support for ARMv8 Disassembler ... I plan to add two kind of CPU emulatinon engine, 'Interpreter' and 'JIT binary translation'. So Disassembler should be independent from these engine.	2017-12-31 04:20:59 +09:00
rkx1209	c9b33b10a5	Add SoftMMU stub and ReadInst function	2017-12-19 17:46:00 +09:00
rkx1209	801685f452	Add ARMv8 register	2017-12-12 17:39:10 +09:00
rkx1209	959898fcb7	Add initial stub code for ARMv8 emulator	2017-12-12 17:00:41 +09:00
rkx1209	ccf5dbb9f0	Add Store method for memory area of emulator	2017-11-16 15:25:26 +09:00
rkx1209	cae0d44cb6	Add Load method for memory area of emulator	2017-11-16 14:12:47 +09:00
rkx1209	3364519abe	Add data structure for AddressSpace	2017-11-16 01:54:41 +09:00
rkx1209	aa4cd7ac53	Add NSO binary loader	2017-11-14 21:23:42 +09:00
rkx1209	186bc1ed5f	Add NintendoObject class for NRO/NSO binary format	2017-10-31 11:58:00 +09:00
rkx1209	6de38b8c2f	Add Initial stuff	2017-10-23 18:02:16 +09:00