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Removed writeback method from Interpreter

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rkx1209 2018-03-09 20:45:07 +09:00
parent fbc62e9664
commit 2052f8e8af
7 changed files with 53 additions and 43 deletions
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1
.gitignore vendored
View file

@ -53,5 +53,6 @@ dkms.conf
.*
core
nsemu
*.log
*.md
test/

32
ARMv8/Disassembler.cpp
View file

@ -730,7 +730,7 @@ static void DisasLdLit(uint32_t insn, DisasCallback *cb) {
size = 2 + extract32(opc, 0, 1);
is_signed = extract32(opc, 1, 1);
}
cb->LoadRegImm64 (rt, PC_IDX, imm - 4, size, false, false, false);
cb->LoadRegI64 (rt, PC_IDX, imm - 4, size, false, false);
}
static bool DisasLdstCompute64bit(unsigned int size, bool is_signed, unsigned int opc) {
@ -783,9 +783,9 @@ static void DisasLdstRegRoffset(uint32_t insn, DisasCallback *cb,
cb->ExtendReg (rm, rm, opt, sf);
cb->ShiftReg (rm, rm, ShiftType_LSL, shift ? size : 0, sf);
if (is_store) {
cb->StoreReg (rt, rn, rm, size, is_extended, false, false, sf);
cb->StoreReg (rt, rn, rm, size, is_extended, false, sf);
} else {
cb->LoadReg (rt, rn, rm, size, is_extended, false, false, sf);
cb->LoadReg (rt, rn, rm, size, is_extended, false, sf);
}
}
@ -850,9 +850,12 @@ static void DisasLdstRegImm9(uint32_t insn, DisasCallback *cb,
ns_abort ("Unreachable status\n");
}
if (is_store) {
cb->StoreRegImm64 (rt, rn, imm9, size, is_extended, post_index, writeback);
cb->StoreRegI64 (rt, rn, imm9, size, is_extended, post_index);
} else {
cb->LoadRegImm64 (rt, rn, imm9, size, is_extended, post_index, writeback);
cb->LoadRegI64 (rt, rn, imm9, size, is_extended, post_index);
}
if (writeback) {
cb->AddI64 (rn, rn, imm9, false, true);
}
}
@ -897,16 +900,16 @@ static void DisasLdstRegUnsignedImm(uint32_t insn, DisasCallback *cb,
if (is_vector) {
/* size must be 4 (128-bit) */
if (is_store) {
cb->StoreRegImm64 (rt, rn, offset, size, false, false, false);
cb->StoreRegI64 (rt, rn, offset, size, false, false);
} else {
cb->LoadRegImm64 (rt, rn, offset, size, false, false, false);
cb->LoadRegI64 (rt, rn, offset, size, false, false);
}
} else {
bool sf = DisasLdstCompute64bit (size, is_signed, opc);
if (is_store) {
cb->StoreRegImm64 (rt, rn, offset, size, is_extended, false, false);
cb->StoreRegI64 (rt, rn, offset, size, is_extended, false);
} else {
cb->LoadRegImm64 (rt, rn, offset, size, is_extended, false, false);
cb->LoadRegI64 (rt, rn, offset, size, is_extended, false);
}
}
}
@ -1007,11 +1010,14 @@ static void DisasLdstPair(uint32_t insn, DisasCallback *cb) {
if (is_load) {
/* XXX: Do not modify rt register before recognizing any exception
* from the second load. */
cb->LoadRegImm64 (rt, rn, offset, size, false, post_index, writeback);
cb->LoadRegImm64 (rt2, rn, offset + (1 << size), size, false, post_index, writeback);
cb->LoadRegI64 (rt, rn, offset, size, false, post_index);
cb->LoadRegI64 (rt2, rn, offset + (1 << size), size, false, post_index);
} else {
cb->StoreRegImm64 (rt, rn, offset, size, false, post_index, writeback);
cb->StoreRegImm64 (rt2, rn, offset + (1 << size), size, false, post_index, writeback);
cb->StoreRegI64 (rt, rn, offset, size, false, post_index);
cb->StoreRegI64 (rt2, rn, offset + (1 << size), size, false, post_index);
}
if (writeback) {
cb->AddI64 (rn, rn, offset, false, true);
}
}

36
ARMv8/Interpreter.cpp
View file

@ -16,7 +16,7 @@ void Interpreter::Run() {
debug_print ("Running with Interpreter\n");
while (Cpu::GetState () == Cpu::State::Running) {
char c;
scanf("%c", &c);
//scanf("%c", &c);
SingleStep ();
Cpu::DumpMachine ();
}
@ -348,7 +348,9 @@ void IntprCallback::ExtendReg(unsigned int rd_idx, unsigned int rn_idx, unsigned
/* Load/Store */
static void _LoadReg(unsigned int rd_idx, uint64_t addr, int size, bool extend) {
debug_print ("Read from addr:0x%lx(%d)\n", addr, size);
if (size < 4) {
if (size < 3) {
W(rd_idx) = ARMv8::ReadU32 (addr);
} else if (size < 4){
X(rd_idx) = ARMv8::ReadU64 (addr);
} else {
/* 128-bit Qt */
@ -362,7 +364,9 @@ static void _LoadReg(unsigned int rd_idx, uint64_t addr, int size, bool extend)
static void _StoreReg(unsigned int rd_idx, uint64_t addr, int size, bool extend) {
debug_print ("Write to addr:0x%lx(%d)\n", addr, size);
if (size < 4) {
if (size < 3) {
ARMv8::WriteU32 (addr, W(rd_idx));
} else if (size < 4) {
ARMv8::WriteU64 (addr, X(rd_idx));
} else {
/* 128-bit Qt */
@ -374,7 +378,7 @@ static void _StoreReg(unsigned int rd_idx, uint64_t addr, int size, bool extend)
}
void IntprCallback::LoadReg(unsigned int rd_idx, unsigned int base_idx, unsigned int rm_idx, int size,
bool extend, bool post, bool writeback, bool bit64) {
bool extend, bool post, bool bit64) {
char regc = bit64? 'X': 'W';
char regdc = size >= 4 ? 'Q' : (size < 3 ? 'W' : 'X');
debug_print ("Load(%d): %c[%u] <= [%c[%u], %c[%u]]\n", size, regdc, rd_idx, regc, base_idx, regc, rm_idx);
@ -385,20 +389,16 @@ void IntprCallback::LoadReg(unsigned int rd_idx, unsigned int base_idx, unsigned
else
addr = X(base_idx) + X(rm_idx);
_LoadReg (rd_idx, addr, size, extend);
if (writeback)
X(base_idx) = addr;
} else {
if (post)
addr = W(base_idx);
else
addr = W(base_idx) + W(rm_idx);
_LoadReg (rd_idx, addr, size, extend);
if (writeback)
W(base_idx) = addr;
}
}
void IntprCallback::LoadRegImm64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size,
bool extend, bool post, bool writeback) {
void IntprCallback::LoadRegI64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size,
bool extend, bool post) {
char regdc = size >= 4 ? 'Q' : (size < 3 ? 'W' : 'X');
debug_print ("Load(%d): %c[%u] <= [X[%u], 0x%lx]\n", size, regdc, rd_idx, base_idx, offset);
uint64_t addr;
@ -407,11 +407,9 @@ void IntprCallback::LoadRegImm64(unsigned int rd_idx, unsigned int base_idx, uin
else
addr = X(base_idx) + offset;
_LoadReg (rd_idx, addr, size, extend);
if (writeback)
X(base_idx) = addr;
}
void IntprCallback::StoreReg(unsigned int rd_idx, unsigned int base_idx, unsigned int rm_idx, int size,
bool extend, bool post, bool writeback, bool bit64) {
bool extend, bool post, bool bit64) {
char regc = bit64? 'X': 'W';
char regdc = size >= 4 ? 'Q' : (size < 3 ? 'W' : 'X');
debug_print ("Store(%d): %c[%u] => [%c[%u], %c[%u]]\n", size, regdc, rd_idx, regc, base_idx, regc, rm_idx);
@ -422,20 +420,16 @@ void IntprCallback::StoreReg(unsigned int rd_idx, unsigned int base_idx, unsigne
else
addr = X(base_idx) + X(rm_idx);
_StoreReg (rd_idx, addr, size, extend);
if (writeback)
X(base_idx) = addr;
} else {
if (post)
addr = W(base_idx);
else
addr = W(base_idx) + W(rm_idx);
_StoreReg (rd_idx, addr, size, extend);
if (writeback)
W(base_idx) = addr;
}
}
void IntprCallback::StoreRegImm64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size,
bool extend, bool post, bool writeback) {
void IntprCallback::StoreRegI64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size,
bool extend, bool post) {
char regdc = size >= 4 ? 'Q' : (size < 3 ? 'W' : 'X');
debug_print ("Store(%d): %c[%u] => [X[%u], 0x%lx]\n", size, regdc, rd_idx, base_idx, offset);
uint64_t addr;
@ -444,8 +438,6 @@ void IntprCallback::StoreRegImm64(unsigned int rd_idx, unsigned int base_idx, ui
else
addr = X(base_idx) + offset;
_StoreReg (rd_idx, addr, size, extend);
if (writeback)
X(base_idx) = addr;
}
/* Bitfield Signed/Unsigned Extract... with Immediate value */
@ -566,6 +558,8 @@ void IntprCallback::BranchI64(uint64_t imm) {
/* Conditional Branch with Immediate value and jump to Immediate address */
void IntprCallback::BranchCondiI64(unsigned int cond, unsigned int rt_idx, uint64_t imm, uint64_t addr, bool bit64) {
char regc = bit64? 'X': 'W';
debug_print ("CondCmp(%u): (%c[%u] cmp 0x%lx) => goto: 0x%lx\n", cond, regc, rt_idx, imm, addr);
if (cond == Disassembler::CondType_EQ) {
if (bit64) {
if (X(rt_idx) == imm) PC = addr;

10
ARMv8/MMU.cpp
View file

@ -15,12 +15,20 @@ static T ReadFromRAM(const uint64_t gpa) {
std::memcpy (&byte, &Memory::pRAM[addr], sizeof(uint8_t));
value = (value << 8) | byte;
}
uint8_t *ptr = &Memory::pRAM[gpa];
bindump (ptr, 2 * sizeof(T));
return value;
}
template<typename T>
static void WriteToRAM(const uint64_t gpa, T value) {
std::memcpy (&Memory::pRAM[gpa], &value, sizeof(T));
for (uint64_t addr = gpa + sizeof(T) - 1; addr >= gpa; addr--) {
uint8_t byte = value & 0xff;
std::memcpy (&Memory::pRAM[addr], &byte, sizeof(uint8_t));
value >>= 8;
}
uint8_t *ptr = &Memory::pRAM[gpa];
bindump (ptr, 2 * sizeof(T));
}
uint8_t ReadU8(const uint64_t gva) {

8
include/ARMv8/Disassembler.hpp
View file

@ -44,10 +44,10 @@ virtual void NotReg(unsigned int rd_idx, unsigned int rm_idx, bool bit64) = 0;
virtual void ExtendReg(unsigned int rd_idx, unsigned int rn_idx, unsigned int extend_type, bool bit64) = 0;
/* Load/Store */
virtual void LoadReg(unsigned int rd_idx, unsigned int base_idx, unsigned int rm_idx, int size, bool extend, bool post, bool writeback, bool bit64) = 0;
virtual void LoadRegImm64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size, bool extend, bool post, bool writeback) = 0;
virtual void StoreReg(unsigned int rd_idx, unsigned int base_idx, unsigned int rm_idx, int size, bool extend, bool post, bool writeback, bool bit64) = 0;
virtual void StoreRegImm64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size, bool extend, bool post, bool writeback) = 0;
virtual void LoadReg(unsigned int rd_idx, unsigned int base_idx, unsigned int rm_idx, int size, bool extend, bool post, bool bit64) = 0;
virtual void LoadRegI64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size, bool extend, bool post) = 0;
virtual void StoreReg(unsigned int rd_idx, unsigned int base_idx, unsigned int rm_idx, int size, bool extend, bool post, bool bit64) = 0;
virtual void StoreRegI64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size, bool extend, bool post) = 0;
/* Bitfield Signed/Unsigned Extract... with Immediate value */
virtual void SExtractI64(unsigned int rd_idx, unsigned int rn_idx, unsigned int pos, unsigned int len, bool bit64) = 0;

8
include/ARMv8/Interpreter.hpp
View file

@ -44,10 +44,10 @@ void NotReg(unsigned int rd_idx, unsigned int rm_idx, bool bit64);
void ExtendReg(unsigned int rd_idx, unsigned int rn_idx, unsigned int extend_type, bool bit64);
/* Load/Store */
void LoadReg(unsigned int rd_idx, unsigned int base_idx, unsigned int rm_idx, int size, bool extend, bool post, bool writeback, bool bit64);
void LoadRegImm64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size, bool extend, bool post, bool writeback);
void StoreReg(unsigned int rd_idx, unsigned int base_idx, unsigned int rm_idx, int size, bool extend, bool post, bool writeback, bool bit64);
void StoreRegImm64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size, bool extend, bool post, bool writeback);
void LoadReg(unsigned int rd_idx, unsigned int base_idx, unsigned int rm_idx, int size, bool extend, bool post, bool bit64);
void LoadRegI64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size, bool extend, bool post);
void StoreReg(unsigned int rd_idx, unsigned int base_idx, unsigned int rm_idx, int size, bool extend, bool post, bool bit64);
void StoreRegI64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size, bool extend, bool post);
/* Bitfield Signed/Unsigned Extract... with Immediate value */
void SExtractI64(unsigned int rd_idx, unsigned int rn_idx, unsigned int pos, unsigned int len, bool bit64);

1
include/Util.hpp
View file

@ -22,6 +22,7 @@ static void util_print(RunLevel level, const char *format, ...) {
vprintf (format, va);
va_end (va);
}
fflush(stdout);
}
#define debug_print(format, ...) util_print (RUN_LEVEL_DEBUG, format, ## __VA_ARGS__)