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https://github.com/RKX1209/nsemu.git
synced 2024-06-21 13:42:37 -04:00
Add disassembler for all data proc imm operations
This commit is contained in:
rkx1209
parent
713b1e0818
commit
da24be5562
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@ -8,7 +8,37 @@ static void UnallocatedOp(uint32_t insn) {
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static bool LogicImmDecode(uint64_t *wmask, unsigned int immn, unsigned int imms, unsigned int immr) {
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assert (immn < 2 && imms < 64 && immr < 64);
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uint64_t mask;
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unsigned int e, levels, s, r;
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int len = 31 - clz32((immn << 6 | (~imms & 0x3f)));
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if (len < 1) {
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/* This is the immn == 0, imms == 0x11111x case */
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return false;
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}
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e = 1 << len;
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levels = e - 1;
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s = imms & levels;
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r = immr & levels;
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if (s == levels) {
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/* <length of run - 1> mustn't be all-ones. */
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return false;
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}
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/* Create the value of one element: s+1 set bits rotated
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* by r within the element (which is e bits wide)...
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*/
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mask = bitmask64(s + 1);
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if (r) {
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mask = (mask >> r) | (mask << (e - r));
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mask &= bitmask64(e);
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}
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mask = replicate64 (mask, e);
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*wmask = mask;
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return true;
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}
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static void DisasPCRelAddr(uint32_t insn, DisasCallback *cb) {
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unsigned int rd, page;
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uint64_t offset, base;
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@ -24,7 +54,7 @@ static void DisasPCRelAddr(uint32_t insn, DisasCallback *cb) {
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offset <<= 12;
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}
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cb->MoviI64 (rd, base + offset);
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cb->MoviI64 (rd, base + offset, false, true);
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}
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static void DisasAddSubImm(uint32_t insn, DisasCallback *cb) {
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@ -87,6 +117,121 @@ static void DisasLogImm(uint32_t insn, DisasCallback *cb) {
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}
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}
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static void DisasMovwImm(uint32_t insn, DisasCallback *cb) {
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unsigned int is_64bit = extract32(insn, 31, 1);
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unsigned int opc = extract32(insn, 29, 2);
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uint64_t imm = extract32(insn, 5, 16);
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unsigned int pos = extract32(insn, 21, 2) << 4;
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unsigned int rd = extract32(insn, 0, 5);
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if (!is_64bit && (pos >= 32)) {
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UnallocatedOp (insn);
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return;
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}
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switch (opc) {
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case 0: /* MOVN */
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case 2: /* MOVZ */
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imm <<= pos;
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if (opc == 0) {
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imm = ~imm;
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}
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cb->MoviI64 (rd, imm, false, is_64bit);
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break;
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case 3: /* MOVK */
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cb->MoviI64 (rd, imm, true, is_64bit);
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break;
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default:
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UnallocatedOp (insn);
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break;
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}
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}
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static void DisasBitfield(uint32_t insn, DisasCallback *cb) {
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unsigned int is_64bit = extract32(insn, 31, 1);
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unsigned int opc = extract32(insn, 29, 2);
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unsigned int n = extract32(insn, 22, 1);
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unsigned int ri = extract32(insn, 16, 6);
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unsigned int si = extract32(insn, 10, 6);
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unsigned int rn = extract32(insn, 5, 5);
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unsigned int rd = extract32(insn, 0, 5);
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unsigned int bitsize = is_64bit ? 64 : 32;
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unsigned int pos, len;
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if (is_64bit != n || ri >= bitsize || si >= bitsize || opc > 2) {
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UnallocatedOp(insn);
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return;
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}
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/* Recognize simple(r) extractions. */
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if (si >= ri) {
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/* Wd<s-r:0> = Wn<s:r> */
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len = (si - ri) + 1;
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if (opc == 0) { /* SBFM: ASR, SBFX, SXTB, SXTH, SXTW */
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cb->SExtractI64(rd, rn, ri, len, is_64bit);
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return;
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} else if (opc == 2) { /* UBFM: UBFX, LSR, UXTB, UXTH */
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cb->UExtractI64(rd, rn, ri, len, is_64bit);
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return;
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}
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pos = 0;
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} else {
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/* Handle the ri > si case with a deposit
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* Wd<32+s-r,32-r> = Wn<s:0>
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*/
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len = si + 1;
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pos = (bitsize - ri) & (bitsize - 1);
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}
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if (opc == 0 && len < ri) {
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/* SBFM: sign extend the destination field from len to fill
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the balance of the word. Let the deposit below insert all
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of those sign bits. */
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cb->SExtractI64(rd, rn, 0, len, is_64bit);
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len = ri;
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}
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if (opc == 1) { /* BFM, BXFIL */
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//TODO: deposit
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} else {
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/* SBFM or UBFM: We start with zero, and we haven't modified
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any bits outside bitsize, therefore the zero-extension
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below is unneeded. */
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//TODO: ???
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//tcg_gen_deposit_z_i64(tcg_rd, tcg_tmp, pos, len);
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}
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return;
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}
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static void DisasExtract(uint32_t insn, DisasCallback *cb) {
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unsigned int sf = extract32(insn, 31, 1);
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unsigned int n = extract32(insn, 22, 1);
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unsigned int rm = extract32(insn, 16, 5);
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unsigned int imm = extract32(insn, 10, 6);
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unsigned int rn = extract32(insn, 5, 5);
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unsigned int rd = extract32(insn, 0, 5);
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unsigned int op21 = extract32(insn, 29, 2);
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unsigned int op0 = extract32(insn, 21, 1);
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unsigned int bitsize = sf ? 64 : 32;
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if (sf != n || op21 || op0 || imm >= bitsize) {
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UnallocatedOp (insn);
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} else {
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if (imm == 0) {
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// TODO: mov rd, rm
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//cb->MovI64(rd, rm, sf);
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} else if (rm == rn) { /* ROR */
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// TODO:
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//cb->RorI64(rd, rm, imm)
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} else {
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// TODO:
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//cb->ShriI64(rm, rm, imm)
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//cb->ShliI64(rn, rn, imm)
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//cb->OrrI64(rd, rm, rn);
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}
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}
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return;
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}
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static void DisasDataProcImm(uint32_t insn, DisasCallback *cb) {
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switch (extract32 (insn, 23, 6)) {
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case 0x20: case 0x21: /* PC-rel. addressing */
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@ -99,10 +244,13 @@ static void DisasDataProcImm(uint32_t insn, DisasCallback *cb) {
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DisasLogImm (insn, cb);
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break;
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case 0x25: /* Move wide (immediate) */
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DisasMovwImm (insn, cb);
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break;
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case 0x26: /* Bitfield */
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DisasBitfield (insn, cb);
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break;
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case 0x27: /* Extract */
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DisasExtract (insn, cb);
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break;
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default:
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UnallocatedOp (insn);
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@ -1,37 +1,40 @@
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/* nsemu - LGPL - Copyright 2017 rkx1209<rkx1209dev@gmail.com> */
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#include "Nsemu.hpp"
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Interpreter *Interpreter ::inst = nullptr;
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IntprCallback *Interpreter ::disas_cb = nullptr;
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Interpreter *Interpreter::inst = nullptr;
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IntprCallback *Interpreter::disas_cb = nullptr;
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int Interpreter ::SingleStep() {
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uint32_t inst = ARMv8 ::ReadInst (PC);
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int Interpreter::SingleStep() {
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uint32_t inst = ARMv8::ReadInst (PC);
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debug_print ("Run Code: 0x%08lx\n", inst);
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PC += sizeof(uint32_t);
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Disassembler ::DisasA64 (inst, disas_cb);
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Disassembler::DisasA64 (inst, disas_cb);
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return 0;
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}
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void Interpreter ::Run() {
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void Interpreter::Run() {
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debug_print ("Running with Interpreter\n");
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while (Cpu ::GetState () == Cpu ::State ::Running) {
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while (Cpu::GetState () == Cpu::State::Running) {
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SingleStep ();
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}
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}
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void IntprCallback ::MoviI64(unsigned int reg_idx, uint64_t imm) {
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debug_print ("Mov: X[%u] = 0x%016lx\n", reg_idx, imm);
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void IntprCallback::MoviI64(unsigned int reg_idx, uint64_t imm, bool unchanged, bool bit64) {
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char regc = bit64? 'X': 'W';
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debug_print ("MOV%c: %c[%u] = 0x%016lx\n", unchanged? 'K' : ' ', regc, reg_idx, imm);
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}
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/* Add/Sub with Immediate value */
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void IntprCallback ::AddiI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t imm, bool setflags, bool bit64) {
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void IntprCallback::AddiI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t imm, bool setflags, bool bit64) {
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char regc = bit64? 'X': 'W';
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debug_print ("Add: %c[%u] = %c[%u] + 0x%016lx (flag: %s)\n", regc, rd_idx, regc, rn_idx, imm, setflags? "update": "no");
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}
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void IntprCallback ::SubiI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t imm, bool setflags, bool bit64) {
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void IntprCallback::SubiI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t imm, bool setflags, bool bit64) {
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char regc = bit64? 'X': 'W';
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debug_print ("Sub: %c[%u] = %c[%u] + 0x%016lx (flag: %s)\n", regc, rd_idx, regc, rn_idx, imm, setflags? "update": "no");
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}
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void IntprCallback ::AndiI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t wmask, bool setflags, bool bit64) {}
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void IntprCallback ::OrrI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t wmask, bool bit64) {}
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void IntprCallback ::EorI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t wmask, bool bit64) {}
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void IntprCallback::AndiI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t wmask, bool setflags, bool bit64) {}
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void IntprCallback::OrrI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t wmask, bool bit64) {}
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void IntprCallback::EorI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t wmask, bool bit64) {}
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void IntprCallback::SExtractI64(unsigned int rd_idx, unsigned int rn_idx, unsigned int pos, unsigned int len, bool bit64) {}
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void IntprCallback::UExtractI64(unsigned int rd_idx, unsigned int rn_idx, unsigned int pos, unsigned int len, bool bit64) {}
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@ -3,7 +3,7 @@
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class DisasCallback {
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public:
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virtual void MoviI64(unsigned int reg_idx, uint64_t imm) = 0;
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virtual void MoviI64(unsigned int reg_idx, uint64_t imm, bool unchanged, bool bit64) = 0;
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/* Add/Sub with Immediate value */
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virtual void AddiI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t imm, bool setflags, bool bit64) = 0;
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virtual void SubiI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t imm, bool setflags, bool bit64) = 0;
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@ -11,6 +11,10 @@ virtual void SubiI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t imm, boo
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virtual void AndiI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t wmask, bool setflags, bool bit64) = 0;
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virtual void OrrI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t wmask, bool bit64) = 0;
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virtual void EorI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t wmask, bool bit64) = 0;
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/* Bitfield Signed/Unsigned Extract... with Immediate value */
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virtual void SExtractI64(unsigned int rd_idx, unsigned int rn_idx, unsigned int pos, unsigned int len, bool bit64) = 0;
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virtual void UExtractI64(unsigned int rd_idx, unsigned int rn_idx, unsigned int pos, unsigned int len, bool bit64) = 0;
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};
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namespace Disassembler {
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@ -3,7 +3,7 @@
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class IntprCallback : public DisasCallback {
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public:
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void MoviI64(unsigned int reg_idx, uint64_t imm);
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void MoviI64(unsigned int reg_idx, uint64_t imm, bool unchanged, bool bit64);
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/* Add/Sub with Immediate value */
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void AddiI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t imm, bool setflags, bool bit64);
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void SubiI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t imm, bool setflags, bool bit64);
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@ -11,6 +11,10 @@ void SubiI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t imm, bool setfla
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void AndiI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t wmask, bool setflags, bool bit64);
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void OrrI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t wmask, bool bit64);
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void EorI64(unsigned int rd_idx, unsigned int rn_idx, uint64_t wmask, bool bit64);
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/* Bitfield Signed/Unsigned Extract... with Immediate value */
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void SExtractI64(unsigned int rd_idx, unsigned int rn_idx, unsigned int pos, unsigned int len, bool bit64);
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void UExtractI64(unsigned int rd_idx, unsigned int rn_idx, unsigned int pos, unsigned int len, bool bit64);
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};
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/* Global Interpreter singleton class .*/
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@ -61,10 +61,26 @@ static inline int64_t sextract64(uint64_t bitfield, int from, int len) {
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return ((int64_t) (bitfield << (64 - from - len))) >> (64 - len);
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}
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static inline int clz32(uint32_t val) {
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return val? __builtin_clz (val): 32;
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static inline int clz32(uint32_t bitfield) {
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return bitfield? __builtin_clz (bitfield): 32;
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}
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static inline int clz64(uint64_t val) {
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return val? __builtin_clzll (val): 64;
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static inline int clz64(uint64_t bitfield) {
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return bitfield? __builtin_clzll (bitfield): 64;
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}
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/* Return a value with the bottom len bits set (where 0 < len <= 64) */
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static inline uint64_t bitmask64(unsigned int length) {
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assert(length > 0 && length <= 64);
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return ~0ULL >> (64 - length);
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}
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static uint64_t replicate64(uint64_t mask, unsigned int e) {
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assert(e != 0);
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while (e < 64) {
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mask |= mask << e;
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e *= 2;
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}
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return mask;
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}
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#endif
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