mirror of
https://github.com/RKX1209/nsemu.git
synced 2024-06-23 06:32:39 -04:00
Removed sf from Load/StoreRegImm64
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parent
4f66ecc9ef
commit
fbc62e9664
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@ -730,7 +730,7 @@ static void DisasLdLit(uint32_t insn, DisasCallback *cb) {
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size = 2 + extract32(opc, 0, 1);
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is_signed = extract32(opc, 1, 1);
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}
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cb->LoadRegImm64 (rt, PC_IDX, imm - 4, size, false, false, false, sf);
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cb->LoadRegImm64 (rt, PC_IDX, imm - 4, size, false, false, false);
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}
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static bool DisasLdstCompute64bit(unsigned int size, bool is_signed, unsigned int opc) {
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@ -850,9 +850,9 @@ static void DisasLdstRegImm9(uint32_t insn, DisasCallback *cb,
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ns_abort ("Unreachable status\n");
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}
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if (is_store) {
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cb->StoreRegImm64 (rt, rn, imm9, size, is_extended, post_index, writeback, sf);
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cb->StoreRegImm64 (rt, rn, imm9, size, is_extended, post_index, writeback);
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} else {
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cb->LoadRegImm64 (rt, rn, imm9, size, is_extended, post_index, writeback, sf);
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cb->LoadRegImm64 (rt, rn, imm9, size, is_extended, post_index, writeback);
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}
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}
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@ -897,16 +897,16 @@ static void DisasLdstRegUnsignedImm(uint32_t insn, DisasCallback *cb,
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if (is_vector) {
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/* size must be 4 (128-bit) */
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if (is_store) {
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cb->StoreRegImm64 (rt, rn, offset, size, false, false, false, true);
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cb->StoreRegImm64 (rt, rn, offset, size, false, false, false);
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} else {
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cb->LoadRegImm64 (rt, rn, offset, size, false, false, false, true);
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cb->LoadRegImm64 (rt, rn, offset, size, false, false, false);
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}
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} else {
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bool sf = DisasLdstCompute64bit (size, is_signed, opc);
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if (is_store) {
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cb->StoreRegImm64 (rt, rn, offset, size, is_extended, false, false, sf);
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cb->StoreRegImm64 (rt, rn, offset, size, is_extended, false, false);
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} else {
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cb->LoadRegImm64 (rt, rn, offset, size, is_extended, false, false, sf);
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cb->LoadRegImm64 (rt, rn, offset, size, is_extended, false, false);
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}
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}
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}
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@ -1007,11 +1007,11 @@ static void DisasLdstPair(uint32_t insn, DisasCallback *cb) {
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if (is_load) {
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/* XXX: Do not modify rt register before recognizing any exception
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* from the second load. */
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cb->LoadRegImm64 (rt, rn, offset, size, false, post_index, writeback, sf);
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cb->LoadRegImm64 (rt2, rn, offset + (1 << size), size, false, post_index, writeback, sf);
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cb->LoadRegImm64 (rt, rn, offset, size, false, post_index, writeback);
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cb->LoadRegImm64 (rt2, rn, offset + (1 << size), size, false, post_index, writeback);
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} else {
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cb->StoreRegImm64 (rt, rn, offset, size, false, post_index, writeback, sf);
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cb->StoreRegImm64 (rt2, rn, offset + (1 << size), size, false, post_index, writeback, sf);
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cb->StoreRegImm64 (rt, rn, offset, size, false, post_index, writeback);
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cb->StoreRegImm64 (rt2, rn, offset + (1 << size), size, false, post_index, writeback);
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}
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}
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@ -376,7 +376,7 @@ static void _StoreReg(unsigned int rd_idx, uint64_t addr, int size, bool extend)
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void IntprCallback::LoadReg(unsigned int rd_idx, unsigned int base_idx, unsigned int rm_idx, int size,
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bool extend, bool post, bool writeback, bool bit64) {
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char regc = bit64? 'X': 'W';
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char regdc = bit64 && size >= 4 ? 'Q' : regc;
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char regdc = size >= 4 ? 'Q' : (size < 3 ? 'W' : 'X');
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debug_print ("Load(%d): %c[%u] <= [%c[%u], %c[%u]]\n", size, regdc, rd_idx, regc, base_idx, regc, rm_idx);
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uint64_t addr;
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if (bit64) {
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@ -398,33 +398,22 @@ void IntprCallback::LoadReg(unsigned int rd_idx, unsigned int base_idx, unsigned
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}
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}
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void IntprCallback::LoadRegImm64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size,
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bool extend, bool post, bool writeback, bool bit64) {
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char regc = bit64? 'X': 'W';
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char regdc = bit64 && size >= 4 ? 'Q' : regc;
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debug_print ("Load(%d): %c[%u] <= [%c[%u], 0x%lx]\n", size, regdc, rd_idx, regc, base_idx, offset);
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bool extend, bool post, bool writeback) {
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char regdc = size >= 4 ? 'Q' : (size < 3 ? 'W' : 'X');
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debug_print ("Load(%d): %c[%u] <= [X[%u], 0x%lx]\n", size, regdc, rd_idx, base_idx, offset);
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uint64_t addr;
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if (bit64) {
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if (post)
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addr = X(base_idx);
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else
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addr = X(base_idx) + offset;
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_LoadReg (rd_idx, addr, size, extend);
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if (writeback)
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X(base_idx) = addr;
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} else {
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if (post)
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addr = W(base_idx);
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else
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addr = W(base_idx) + offset;
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_LoadReg (rd_idx, addr, size, extend);
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if (writeback)
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W(base_idx) = addr;
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}
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if (post)
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addr = X(base_idx);
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else
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addr = X(base_idx) + offset;
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_LoadReg (rd_idx, addr, size, extend);
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if (writeback)
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X(base_idx) = addr;
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}
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void IntprCallback::StoreReg(unsigned int rd_idx, unsigned int base_idx, unsigned int rm_idx, int size,
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bool extend, bool post, bool writeback, bool bit64) {
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char regc = bit64? 'X': 'W';
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char regdc = bit64 && size >= 4 ? 'Q' : regc;
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char regdc = size >= 4 ? 'Q' : (size < 3 ? 'W' : 'X');
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debug_print ("Store(%d): %c[%u] => [%c[%u], %c[%u]]\n", size, regdc, rd_idx, regc, base_idx, regc, rm_idx);
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uint64_t addr;
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if (bit64) {
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@ -446,28 +435,17 @@ void IntprCallback::StoreReg(unsigned int rd_idx, unsigned int base_idx, unsigne
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}
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}
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void IntprCallback::StoreRegImm64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size,
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bool extend, bool post, bool writeback, bool bit64) {
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char regc = bit64? 'X': 'W';
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char regdc = bit64 && size >= 4 ? 'Q' : regc;
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debug_print ("Store(%d): %c[%u] => [%c[%u], 0x%lx]\n", size, regdc, rd_idx, regc, base_idx, offset);
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bool extend, bool post, bool writeback) {
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char regdc = size >= 4 ? 'Q' : (size < 3 ? 'W' : 'X');
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debug_print ("Store(%d): %c[%u] => [X[%u], 0x%lx]\n", size, regdc, rd_idx, base_idx, offset);
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uint64_t addr;
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if (bit64) {
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if (post)
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addr = X(base_idx);
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else
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addr = X(base_idx) + offset;
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_StoreReg (rd_idx, addr, size, extend);
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if (writeback)
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X(base_idx) = addr;
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} else {
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if (post)
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addr = W(base_idx);
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else
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addr = W(base_idx) + offset;
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_StoreReg (rd_idx, addr, size, extend);
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if (writeback)
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W(base_idx) = addr;
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}
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if (post)
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addr = X(base_idx);
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else
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addr = X(base_idx) + offset;
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_StoreReg (rd_idx, addr, size, extend);
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if (writeback)
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X(base_idx) = addr;
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}
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/* Bitfield Signed/Unsigned Extract... with Immediate value */
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@ -45,9 +45,9 @@ virtual void ExtendReg(unsigned int rd_idx, unsigned int rn_idx, unsigned int ex
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/* Load/Store */
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virtual void LoadReg(unsigned int rd_idx, unsigned int base_idx, unsigned int rm_idx, int size, bool extend, bool post, bool writeback, bool bit64) = 0;
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virtual void LoadRegImm64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size, bool extend, bool post, bool writeback, bool bit64) = 0;
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virtual void LoadRegImm64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size, bool extend, bool post, bool writeback) = 0;
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virtual void StoreReg(unsigned int rd_idx, unsigned int base_idx, unsigned int rm_idx, int size, bool extend, bool post, bool writeback, bool bit64) = 0;
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virtual void StoreRegImm64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size, bool extend, bool post, bool writeback, bool bit64) = 0;
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virtual void StoreRegImm64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size, bool extend, bool post, bool writeback) = 0;
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/* Bitfield Signed/Unsigned Extract... with Immediate value */
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virtual void SExtractI64(unsigned int rd_idx, unsigned int rn_idx, unsigned int pos, unsigned int len, bool bit64) = 0;
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@ -45,9 +45,9 @@ void ExtendReg(unsigned int rd_idx, unsigned int rn_idx, unsigned int extend_typ
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/* Load/Store */
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void LoadReg(unsigned int rd_idx, unsigned int base_idx, unsigned int rm_idx, int size, bool extend, bool post, bool writeback, bool bit64);
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void LoadRegImm64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size, bool extend, bool post, bool writeback, bool bit64);
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void LoadRegImm64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size, bool extend, bool post, bool writeback);
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void StoreReg(unsigned int rd_idx, unsigned int base_idx, unsigned int rm_idx, int size, bool extend, bool post, bool writeback, bool bit64);
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void StoreRegImm64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size, bool extend, bool post, bool writeback, bool bit64);
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void StoreRegImm64(unsigned int rd_idx, unsigned int base_idx, uint64_t offset, int size, bool extend, bool post, bool writeback);
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/* Bitfield Signed/Unsigned Extract... with Immediate value */
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void SExtractI64(unsigned int rd_idx, unsigned int rn_idx, unsigned int pos, unsigned int len, bool bit64);
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