Add method gma_write_acpi_tables.
No need to update GNVS as it doesn't have ASLB.
BUG=none
BRANCH=none
TEST=none
Change-Id: Ib4b9afce32ada234f26322b8002c465bba74a596
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: ee14ccca7a
Original-Change-Id: Ia138cfde2271a298c36b85e999ff69f0f211ba11
Original-Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Original-Reviewed-on: https://review.coreboot.org/19909
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Original-Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://chromium-review.googlesource.com/538578
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
This driver reinvented MAINBOARD_DO_NATIVE_VGA_INIT in a very special
way: If it wasn't set, perform native gfx init in textmode, if it was
set, perform native gfx init in linear framebuffer mode. Test for
LINEAR_FRAMEBUFFER instead and make the native gfx init optional.
Also, make Kconfig reflect the actual behaviour.
BUG=none
BRANCH=none
TEST=none
Change-Id: Ife5c5357bc5efef51d0def034b0fb3f3b4caaa45
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: a1f842d158
Original-Change-Id: If20fd1f5b0f4127b426e8ff94acc61fcd4eb49af
Original-Signed-off-by: Nico Huber <nico.h@gmx.de>
Original-Reviewed-on: https://review.coreboot.org/20131
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/538577
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
This was the single spot where VGA_BIOS_ID wasn't guarded by anything.
It resulted in the wrong default id if we didn't chose to add a VGA BIOS
at first but added one later (e.g. a board provided default guarded by
VGA_BIOS wasn't applied then, because the Via/CN700 value was already
set).
BUG=none
BRANCH=none
TEST=none
Change-Id: Idea0ab009cc745ce480031f144c8b66c9278198e
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: e8f6569ab3
Original-Change-Id: Ia16a5e6d194191d8da8c551d6eb3849bc65864a9
Original-Signed-off-by: Nico Huber <nico.h@gmx.de>
Original-Reviewed-on: https://review.coreboot.org/20101
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/538576
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Use common init_igd_opregion method.
BUG=none
BRANCH=none
TEST=none
Change-Id: Icea02c61ca2846880b2a7a3f8b1b6c75b12972c4
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 402e9c18dd
Original-Change-Id: Ia10a28d05b611a59f787b53f9736b3b76a19ea4a
Original-Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Original-Reviewed-on: https://review.coreboot.org/19908
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/538575
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Use common init_igd_opregion method.
BUG=none
BRANCH=none
TEST=none
Change-Id: Ieb90061fda4eeadb0c1131fc5682856833e8a337
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 5c82026ca6
Original-Change-Id: Ic8a85d1373f04814b4460cce377d6e096bcdc349
Original-Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Original-Reviewed-on: https://review.coreboot.org/19907
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/538574
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Too low gfx_uma_size can result in problems if the framebuffer
does not fit.
This partially reverts: 7afcfe0 "gm45: enable setting all vram sizes
from cmos"
BUG=none
BRANCH=none
TEST=none
Change-Id: I123e68c49e5329b5729cd593a0bb40f1156ec5f7
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: d65ff22988
Original-Change-Id: I485d24198cb784db5d2cfce0a8646e861a4a1695
Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Reviewed-on: https://review.coreboot.org/20194
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Original-Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://chromium-review.googlesource.com/538573
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Commit 2e7f6cc introduced the 'no graphics init' option for
FSP 1.1 SoCs using a GOP driver to init the display, but selecting
that option while including a VBT breaks compilation for Braswell
and Skylake devices because the VBT and GOP driver are intertwined.
This patch decouples the VBT from the GOP driver execution,
allowing the 'no graphics init' option to compile (and work)
properly when CONFIG_ADD_VBT_DATA_FILE=y.
BUG=none
BRANCH=none
TEST=none
Change-Id: I25447b151e00c2505e7c6eff9411adbbadaa9848
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 660de34bbf
Original-Change-Id: Ifbcf32805177c290c4781b32bbcca679bcb0c297
Original-Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/20210
Original-Reviewed-by: Nico Huber <nico.h@gmx.de>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Youness Alaoui <snifikino@gmail.com>
Reviewed-on: https://chromium-review.googlesource.com/538572
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
The new config choice is called RUN_FSP_GOP. Some things had to happen
on the road:
* Drop confusing config GOP_SUPPORT,
* Add HAVE_FSP_GOP to chipsets that support it,
* Make running the GOP an option for FSP2.0 by returning 0
in random VBT getters.
BUG=none
BRANCH=none
TEST=none
Change-Id: Icf0e46a75e0440c458f554de748d2e979dfffa30
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 2e7f6ccafc
Original-Change-Id: I92f88424004a4c0abf1f39cc02e2a146bddbcedf
Original-Signed-off-by: Nico Huber <nico.huber@secunet.com>
Original-Reviewed-on: https://review.coreboot.org/19815
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/533093
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Provide all gfx init methods as a Kconfig `choice`. This elimates the
option to select native gfx init along with running a Video BIOS. It's
been only theoretically useful in one corner case: Hybrid graphics
where only one controller is supported by native gfx init. Though I
suppose in that case it's fair to assume that one would use SeaBIOS to
run the VBIOS.
For the case that we want the payload to initialize graphics or no
pre-boot graphics at all, the new symbol NO_GFX_INIT was added to the
choice. If multiple options are available, the default is chosen as
follows:
* NO_GFX_INIT, if we add a Video BIOS and the payload is SeaBIOS,
* VGA_ROM_RUN, if we add a Video BIOS and the payload is not SeaBIOS,
* NATIVE_VGA_INIT, if we don't add a Video BIOS.
As a side effect, libgfxinit is now an independent choice.
BUG=none
BRANCH=none
TEST=none
Change-Id: I7d9ee12b47caa8909bd204929adecfc7f78f027c
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: d4ebeaf475
Original-Change-Id: I06bc65ecf3724f299f59888a97219fdbd3d2d08b
Original-Signed-off-by: Nico Huber <nico.huber@secunet.com>
Original-Reviewed-on: https://review.coreboot.org/19814
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/533052
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
MAINBOARD_FORCE_NATIVE_VGA_INIT is to be selected instead of the user
option MAINBOARD_DO_NATIVE_VGA_INIT. The distinction is necessary to
use the latter in a choice.
BUG=none
BRANCH=none
TEST=none
Change-Id: Id68ef8d1fe1e00e03f8867d404c7b6b6e2ddd505
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 26ce9af9a0
Original-Change-Id: I689aa5cadea9e1091180fd38b1dc093c6938d69c
Original-Signed-off-by: Nico Huber <nico.huber@secunet.com>
Original-Reviewed-on: https://review.coreboot.org/19813
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/533051
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Make the "Display" menu a submenu of "Devices", place it below the
graphics options and reorder options by their dependencies.
BUG=none
BRANCH=none
TEST=none
Change-Id: I20f098649aebf71de278ff233df59081896a21a4
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: a2cf686396
Original-Change-Id: I9de3d8f76ae10b0a77678ce2d71f840fac32379c
Original-Signed-off-by: Nico Huber <nico.h@gmx.de>
Original-Reviewed-on: https://review.coreboot.org/19806
Original-Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/533050
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Remove the weak function stub fill_lb_framebuffer() and guard with the
new `CONFIG_LINEAR_FRAMEBUFFER` instead.
BUG=none
BRANCH=none
TEST=none
Change-Id: Ibd4095700b0e89eb9c933df30af00e7acb43bb7f
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: ce768f3baf
Original-Change-Id: Ia9e477c2d501b249a632968b5636ac803323895a
Original-Signed-off-by: Nico Huber <nico.h@gmx.de>
Original-Reviewed-on: https://review.coreboot.org/19807
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Reviewed-on: https://chromium-review.googlesource.com/533049
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Rename `FRAMEBUFFER_KEEP_VESA_MODE` to `LINEAR_FRAMEBUFFER` and put
it together with new `VGA_TEXT_FRAMEBUFFER` into a choice. There are
two versions of `LINEAR_FRAMEBUFFER` that differ only in the prompt
and help text (one for `HAVE_VBE_LINEAR_FRAMEBUFFER` and one for
`HAVE_LINEAR_FRAMEBUFFER`). Due to `kconfig_lint` we have to model
that with additional symbols.
BUG=none
BRANCH=none
TEST=none
Change-Id: I095dd4f36d853de51387895bace494840aaca3c1
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 6d8266b91d
Original-Change-Id: I9144351491a14d9bb5e650c14933b646bc83fab0
Original-Signed-off-by: Nico Huber <nico.h@gmx.de>
Original-Reviewed-on: https://review.coreboot.org/19804
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/533048
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Like HAVE_VGA_TEXT_FRAMEBUFFER, these are selected by graphics drivers
that support a linear framebuffer. Some related settings moved to the
drivers (i.e. for rockchip/rk3288 and nvidia/tegra124) since they are
hardcoded.
BUG=none
BRANCH=none
TEST=none
Change-Id: If1746137edf2c976786e5b1a73c079d7e6c0f6d6
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 7971582ec4
Original-Change-Id: Iff6dac5a5f61af49456bc6312e7a376def02ab00
Original-Signed-off-by: Nico Huber <nico.h@gmx.de>
Original-Reviewed-on: https://review.coreboot.org/19800
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/533047
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
* Rename it to HAVE_VGA_TEXT_FRAMEBUFFER.
* Let drivers select it if they are in charge.
* Don't select it on the mainboard level if a driver handles it.
BUG=none
BRANCH=none
TEST=none
Change-Id: I388e134017ee441cbd67b9a66fdbc07d992c9650
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: ce642f08b9
Original-Change-Id: I2d9d09be9aa6d019e77460e69a245ad2d8cda4ea
Original-Signed-off-by: Nico Huber <nico.huber@secunet.com>
Original-Reviewed-on: https://review.coreboot.org/19791
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/533046
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Place it into new edid_fill_fb.c, and invert the logic of the Kconfig
guard (NATIVE_VGA_INIT_USE_EDID is now !NO_EDID_FILL_FB). It has to be
selected by all drivers that use MAINBOARD_DO_NATIVE_VGA_INIT but pro-
vide their own fill_lb_framebuffer() implementation.
BUG=none
BRANCH=none
TEST=none
Change-Id: I5c147f429580ad3c43ff255c1a059196fc8cf1f5
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 3db7653aab
Original-Change-Id: I90634b835bd8e2d150b1c714328a5b2774d891bd
Original-Signed-off-by: Nico Huber <nico.huber@secunet.com>
Original-Reviewed-on: https://review.coreboot.org/19764
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/533045
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
BUG=none
BRANCH=none
TEST=none
Change-Id: If93eebd6929e3119a9cb6918b6c95008b0d93fbf
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 746aa054e2
Original-Change-Id: I786848cd48c6fcfecf9b72c60623cadcfcbb7db7
Original-Signed-off-by: Nico Huber <nico.h@gmx.de>
Original-Reviewed-on: https://review.coreboot.org/19803
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://chromium-review.googlesource.com/533044
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
BUG=none
BRANCH=none
TEST=none
Change-Id: Ib7c915f85fb38b04f99b1a97704d3779902a351c
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 0df9a01009
Original-Change-Id: I3cd5e99b9954a68837de85b49b4389b668e00cf4
Original-Signed-off-by: Nico Huber <nico.h@gmx.de>
Original-Reviewed-on: https://review.coreboot.org/19802
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://chromium-review.googlesource.com/533043
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
There's no users of vbe_mode_info_valid() aside from the local
compilation units. Remove the declaration and make the function
static to the current global implementers.
BUG=none
BRANCH=none
TEST=none
Change-Id: I12a5c25769e399734edbb1f386f7febe6f6bd8a9
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 57e15e609e
Original-Change-Id: I4872ac6ad15ba6a86bba69d51a8348b9921c152d
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/19730
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://chromium-review.googlesource.com/533042
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
For some reason the "interface" for adding framebuffer information
is sitting in src/include/vbe.h while also guarding the call to
fill_lb_framebuffer() with vbe_mode_info_valid() along with some
macro if CONFIG_* for good measure.
Move the fill_lb_framebuffer() declaration to coreboot_tables.h and
provide a comment about how it should be used. Also, now that
there's no need for the notion of a global vbe_mode_info_valid()
remove it from the conditional call path of fill_lb_framebuffer().
BUG=none
BRANCH=none
TEST=none
Change-Id: I8ebd24b872d568c4991fd56d344fbd4629071239
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: bdb5c8feae
Original-Change-Id: Ib3ade6314624091ae70424664527a02b279d0c9b
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Signed-off-by: Nico Huber <nico.huber@secunet.com>
Original-Reviewed-on: https://review.coreboot.org/19729
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://chromium-review.googlesource.com/533041
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Clean up NGI code now that libgfxinit has replaced old C code:
- replace #if preprocessor guards with if (IS_ENABLED(...))
- don't guard variable declarations
- remove code that would only be executed for old NGI / isn't
used by libgfxinit
Test: boot google/wolf with VBIOS, NGI, and UEFI/GOP video init,
observe payload and pre-OS graphics display functional.
BUG=none
BRANCH=none
TEST=none
Change-Id: Icdc95edeec9812b7d76ab32729052c46a7658509
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 6955b9c5b2
Original-Change-Id: I96e74f49ea70e09cbac6f8af561de3e18fa7d260
Original-Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/19327
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Nico Huber <nico.h@gmx.de>
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Reviewed-on: https://chromium-review.googlesource.com/533040
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Some renamings force us to update our code:
* Scan_Ports() moved into a new package Display_Probing.
* Ports Digital[123] are called HDMI[123] now (finally!).
* `Configs_Type` became `Pipe_Configs`, `Config_Index` `Pipe_Index`.
Other noteworthy changes in libgfxinit:
* libgfxinit now knows about ports that share pins (e.g. HDMI1 and
DP1) and refuses to enable any of them if both are connected
(which is physically possible on certain ThinkPad docks).
* Major refactoring of the high-level GMA code.
BUG=none
BRANCH=none
TEST=none
Change-Id: I54b958e7fc141fdb112b0594b159e08d2981aef0
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 989aae9f61
Original-Change-Id: I0ac376c6a3da997fa4a23054198819ca664b8bf0
Original-Signed-off-by: Nico Huber <nico.h@gmx.de>
Original-Reviewed-on: https://review.coreboot.org/18770
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/533039
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
- remove old, buggy NGI code from falco/peppy variants
- remove superfluous INTEL_DP/INTEL_DDI configs, since already
selected by northbridge/haswell
- always use libgfxinit when use native init config selected
- enable NGI/libgfxinit for all slippy variants
The reset of the old Haswell NGI code will be cleaned up in
a subsequent patchset.
Test: select MAINBOARD_DO_NATIVE_VGA_INIT, observe panel init
using SeaBIOS and Tianocore payloads on peppy, wolf variants
[pg: add CQ-DEPEND to cover all pending graphics commits.
There are some fun little bugs and fixes along the chain.]
BUG=none
BRANCH=none
TEST=none
CQ-DEPEND=CL:538580
Change-Id: Ie127751e69309b2f3082e96ec1689c2600f4e526
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 472d5111ad
Original-Change-Id: Id5727cad7f714ffa57e77e2a25505e3c28f55237
Original-Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/18824
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://chromium-review.googlesource.com/533038
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
As the hardware designed on gru, the AP_I2C_TP_PU_EN (gpio3_b4) controlled
the SCL/SDA status to avoid leakage. And the gpio3_b4 of rk3399 pull
resistor is 26k~71k and 3.3v for supply power, and gpio3_b4 pin connected
2.2k resistor to i2c of TP device.
The default of this gpio status is pulled up during the start to bootup,
it's very weak drive for the TP device that maybe cause to trigger the
recovery process of elan's firmware.
Also, the Elan updated its firmware(102.0.5.0) to delay checking the
i2c of touchpad is greater than 1 second.
So we have to drive the stronger pull-up within 1 second of powering up
the touchpad to prevent its firmware from falling into recovery.
BUG=b:36705749
BRANCH=gru
TEST=none
Old-change-Id: I9a67d1c041afafde24ed9f00716ba41a9b41a8da
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-on: https://review.coreboot.org/19863
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Change-Id: Ibb0ba3eff09de727e60a2bff5603deade4dc3d54
Reviewed-on: https://chromium-review.googlesource.com/537772
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Philip Chen <philipchen@chromium.org>
I had a stupid. :( Asterisks have a special meaning in regexes, but I
just wanted to match three literal ones. This kills the regex parser.
BUG=chromium:729621
Change-Id: Ia6149e72715d651c914583ed3235680ce5b7a2e0
Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/20171
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Reviewed-on: https://chromium-review.googlesource.com/537138
Ensure that the provided ME/TXE firmware is valid, using the
check capabilities of me_cleaner.
me_cleaner checks that the fundamental partition is available and
it has a correct signature. The checks performed by me_cleaner
aren't exhaustive, but they should find at least whether the user
has provided an empty or corrupted firmware.
me_cleaner has been tested on all the ME (6-11.6) and TXE (1-3)
firmwares available here [1], and it hasn't reported any false
positive.
[1] http://www.win-raid.com/t832f39-Intel-Engine-Firmware-Repositories.html
BUG=none
BRANCH=none
TEST=none
CQ-DEPEND=CL:535697
Change-Id: Idcda139803b2d64813ece6cfbadac5ef0997483e
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 16719ad143
Original-Change-Id: Ie6ea3b4e637dca4097b9377bd0507e84c4e8f687
Original-Signed-off-by: Nicola Corna <nicola@corna.info>
Original-Reviewed-on: https://review.coreboot.org/18768
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Reviewed-on: https://chromium-review.googlesource.com/533094
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Separate the required CPPFLAGS from environment overridable CFLAGS.
BUG=none
BRANCH=none
TEST=none
Change-Id: Id32f44086ede9f8058cfa57a09a9bbd98da6c4e4
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: cce508fed2
Original-Change-Id: I0c1c0a1cebc7f7971634bf57d4a2370939c43fda
Original-Signed-off-by: Nico Huber <nico.huber@secunet.com>
Original-Reviewed-on: https://review.coreboot.org/20175
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Original-Reviewed-by: Hannah Williams <hannah.williams@intel.com>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/535635
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
BUG=none
BRANCH=none
TEST=none
Change-Id: I120c3e5823abb08ce8b636306b54ac76848a5f77
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: cde2bdf496
Original-Change-Id: Ib4fc326c6612f2d142c8a5220949fbb4b97c37a1
Original-Signed-off-by: Nico Huber <nico.huber@secunet.com>
Original-Reviewed-on: https://review.coreboot.org/20176
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/535636
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
BUG=none
BRANCH=none
TEST=none
CQ-DEPEND=CL:535635
Change-Id: I51b34fa7492d0b60d7f06d8789b40e877170fcfe
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: af83db2659
Original-Change-Id: I66a243486a347313103ffd2cb2ca0447228e4054
Original-Signed-off-by: Nico Huber <nico.huber@secunet.com>
Original-Reviewed-on: https://review.coreboot.org/19586
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://chromium-review.googlesource.com/533095
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
I'm pretty much already doing this anyway, so I might as well document
it. Separating out some older ARM SoCs that were added by other people
and are pretty much orphaned now.
I can also fill out the MISSING: MEMLAYOUT point (since I wrote that).
[pg: add tons of trailers in the commit message
to make gerrit-rebase sane again]
BUG=none
BRANCH=none
TEST=none
Change-Id: I927661db7be11ef7d58e18028ab62d9caf2f353e
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: c34e41fef6
Original-Change-Id: I8b78d592a1ed68a42e5785ebdc13df2edf9007bf
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/20137
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Gerrit-Rebase-Ignore-CLs-Before: https://review.coreboot.org/18141
Ignore-CL-Reviewed-on: https://review.coreboot.org/18954
Ignore-CL-Reviewed-on: https://review.coreboot.org/18955
Ignore-CL-Reviewed-on: https://review.coreboot.org/18988
Ignore-CL-Reviewed-on: https://review.coreboot.org/19279
Ignore-CL-Reviewed-on: https://review.coreboot.org/19356
Ignore-CL-Reviewed-on: https://review.coreboot.org/19430
Ignore-CL-Reviewed-on: https://review.coreboot.org/19476
Ignore-CL-Reviewed-on: https://review.coreboot.org/19596
Ignore-CL-Reviewed-on: https://review.coreboot.org/20090
Ignore-CL-Reviewed-on: https://review.coreboot.org/20091
Reviewed-on: https://chromium-review.googlesource.com/533037
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
BUG=none
BRANCH=none
TEST=none
Change-Id: Ideb937d7f7bde4ac4203b3f9686cdedab43c446c
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 049347fee0
Original-Change-Id: I558e6c63caf95ec5279ec5a866b54fb199116469
Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Reviewed-on: https://review.coreboot.org/19678
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Original-Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://chromium-review.googlesource.com/531732
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
The previous code seemed weird and tried to check if its selected
value is supported three times.
This also lower the clock if a selected frequency does not result in a
supported CAS number.
BUG=none
BRANCH=none
TEST=none
Change-Id: I63ba605ab32523bb9632d530c7e938e7083be7d4
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 9ed74b54b5
Original-Change-Id: I1df20a0a723dc515686a766ad1b0567d815f6e89
Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Reviewed-on: https://review.coreboot.org/19717
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://chromium-review.googlesource.com/531731
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
The previous code seemed weird and tried to check if its selected
value is supported three times.
This also lower the clock if a selected frequency does not result in a
supported CAS number.
BUG=none
BRANCH=none
TEST=none
Change-Id: I1a51fa7a94196e5dbb396e8baddf41f5f05b3f0a
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: dcd3cef874
Original-Change-Id: I97244bc3940813c5a5fcbd770d71cca76d21fcae
Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Reviewed-on: https://review.coreboot.org/19716
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://chromium-review.googlesource.com/531730
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Fix line over 80 characters, spaces required around comparisons,space
required after close brace '}', comma ',', semicolon ';', space
prohibited after ')' errors and warnings
BUG=none
BRANCH=none
TEST=none
Change-Id: Ibdfc8053dcc260e7ded7f528aaf7c7bf15333893
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: f6934f5c6c
Original-Change-Id: I5585f55a606d4f2149b17ac92cbdd832f242630e
Original-Signed-off-by: Evelyn Huang <evhuang@google.com>
Original-Reviewed-on: https://review.coreboot.org/20099
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://chromium-review.googlesource.com/531729
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Based on the Intel G41 chipset, ICH7 southbridge, and IT8720F Super I/O.
Tested, working:
* Booting Linux 4.11.3 and Windows 8.1 from USB and HDD
* Resume from S3 (Linux and Windows)
* Native raminit (DDR2-800)
* Native graphics init (SeaBIOS, Linux)
* Graphics init with VGA BIOS (SeaBIOS, Windows)
* PCI-E x16 PEG slot, PCI-E x1 slot from southbridge
* Realtek ALC888 HD Audio (including front panel and jack detection)
* Realtek R8168 Gigabit LAN
* Both SATA ports
* USB 1.1 and 2.0 devices (keyboard, mass storage)
* PC speaker beep
* COM header
* Super I/O Environment controller (temps, voltage, fans)
* PS/2 keyboard and mouse
* Flashing with `flashrom -p internal`
* 1MiB and 2MiB SPI flash chips
* CMOS gfx_uma_size
Appears, OS driver loads, but otherwise untested:
* IrDA header
* CIR header
* TPM header
Untested:
* S/PDIF digital audio
Tested, known broken:
* CMOS power_on_after_fail
* USB keyboard in secondary payloads
BUG=none
BRANCH=none
TEST=none
Change-Id: Iecb5ecf8a718755b5ce8f1ea52a803f609fea726
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 82651463e3
Original-Change-Id: Ifc4c8935b1a11e55f4bf6cfa484a8a8d09b1adda
Original-Signed-off-by: Samuel Holland <samuel@sholland.org>
Original-Reviewed-on: https://review.coreboot.org/20027
Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-on: https://chromium-review.googlesource.com/531728
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Test: boot OS (Ubuntu, Windows 10) on librem13v2, verify BT
function key toggle now works correctly.
BUG=none
BRANCH=none
TEST=none
Change-Id: I263e72ba44dee7428d2b46533a6bff66475213eb
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: ab7127771d
Original-Change-Id: I68dc99e72a09f7affbcd691d03dd4607a898313e
Original-Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/19897
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Youness Alaoui <snifikino@gmail.com>
Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/531727
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
I updated my spike patch[1] to cleanly apply to current spike master.
As a side effect, the UART is now at 0x02100000.
[1]: https://github.com/riscv/riscv-isa-sim/pull/53
BUG=none
BRANCH=none
TEST=none
Change-Id: Ibc0fdb395099e54c8aec2d37b28c2c4489500b08
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 035cf71822
Original-Change-Id: I4cb09014619e230011486fa57636abe183baa4be
Original-Signed-off-by: Jonathan Neuschfer <j.neuschaefer@gmx.net>
Original-Reviewed-on: https://review.coreboot.org/20126
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://chromium-review.googlesource.com/531726
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Fix line over 80 characters, unnecessary braces for single statement
blocks, spaces before close parantheses errors and warnings.
Signed-off-by: Evelyn Huang <evhuang@google.com>
BUG=none
BRANCH=none
TEST=none
Change-Id: I1d4319f7dda4d94d867d995ad89e9995ecc9c67b
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: ccc5513bd7
Original-Change-Id: I31b1932a2c1e401e56751e0c790bcc6287fb550d
Original-Reviewed-on: https://review.coreboot.org/20097
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/531725
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Fix space prohibited between function name and open parenthesis, line
over 80 characters, unnecessary braces for single statement blocks,
space required before open brace errors and warnings
BUG=none
BRANCH=none
TEST=none
Change-Id: Id624639572ab0f643a35f47aceba0c4ecbdc8249
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 877b586691
Original-Change-Id: I66f1a8640ec5c9d8a1dd039088598f40e8d30f95
Original-Signed-off-by: Evelyn Huang <evhuang@google.com>
Original-Reviewed-on: https://review.coreboot.org/20096
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/531724
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Some of these can be changed from #if to if(), but that will happen
in a follow-on commmit.
BUG=none
BRANCH=none
TEST=none
Change-Id: I4c6088dfff54afb4090490d890caacc445bd5067
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 53de6cd1c3
Original-Change-Id: I5a674cd7a360a0dd040c859ec1f8d760d7c83364
Original-Signed-off-by: Martin Roth <martinroth@google.com>
Original-Reviewed-on: https://review.coreboot.org/20130
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://chromium-review.googlesource.com/531723
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
BUG=none
BRANCH=none
TEST=none
Change-Id: I21585cc31b8534a517474ae09368841235c26f2a
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 6a3d0bfc1f
Original-Change-Id: Id88455f2c7c28e0b298675b9af2a39361759a34a
Original-Signed-off-by: Martin Roth <martinroth@google.com>
Original-Reviewed-on: https://review.coreboot.org/19120
Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/531722
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
BUG=none
BRANCH=none
TEST=none
Change-Id: I1dd7c26c911c13e4ab09e688c7b191bf7dd169d5
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: e20f3d02b5
Original-Change-Id: I1c4b30ab47e12ec35cb681ec5c6635ecd20aa2e5
Original-Signed-off-by: Martin Roth <martinroth@google.com>
Original-Reviewed-on: https://review.coreboot.org/19121
Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/531721
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
For an unknown reason, the I2C ACPI devices were placed
under \SB intead of \SB.PCI0, as with all other non-Atom
based Intel platforms. While Linux is tolerant of this,
Windows is not. Correct by moving I2C ACPI devices where
they belong.
Also, adjust I2C devices at board level for google/rambi
as to not break compilation.
BUG=none
BRANCH=none
TEST=none
Change-Id: I3afebbfaf56aa8cc9756d8878f9dda458d81f679
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: e34a7705e6
Original-Change-Id: I4ef978214aa36078dc04ee1c73b3e2b4bb22f692
Original-Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/20056
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/531720
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
The word 'coreboot' should always be written in lowercase, even at the
start of a sentence.
Unfortunately, some external websites and projects are spelling coreboot
with an uppercase C, so references to those pages can't be changed
without breaking the link.
BUG=none
BRANCH=none
TEST=none
Change-Id: I577e92745dcb9a85b09b6ac77f247801b4b37086
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 4b18a922f0
Original-Change-Id: I79824da8a9ed36a1e4fe23a1711a89535267bf5f
Original-Signed-off-by: Martin Roth <martinroth@google.com>
Original-Reviewed-on: https://review.coreboot.org/20031
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://chromium-review.googlesource.com/531719
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
This device is extremely similar to the IT8718F, so support is based on
existing support for the IT8718F. The CIR device is only detected by
Linux/Windows from the ACPI tables, so ACPI support is extended from the
IT8783E/F (for ACPI). This Super I/O is used on the Foxconn G41S-K.
Tested, working:
* Serial port 1
* Environment controller
- Temperature monitoring
- Voltage monitoring
- Fan control (automatic and manual)
* PS/2 keyboard and mouse
Appears, OS driver loads, but otherwise untested:
* Serial port 2
* Consumer IR
Untested:
* Floppy controller
* Parallel port
* GPIO
BUG=none
BRANCH=none
TEST=none
Change-Id: I4abe90a500a674e5bf543338a400803efd205b96
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 1318ea600b
Original-Change-Id: Ib9a6fe91a772d78f4d122a6c516feff8658ada0a
Original-Signed-off-by: Samuel Holland <samuel@sholland.org>
Original-Reviewed-on: https://review.coreboot.org/20026
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://chromium-review.googlesource.com/531718
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
BUG=none
BRANCH=none
TEST=none
Change-Id: I361efbbe6d514726e2c48700fcefd8a4aaa10d5c
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: da8ca6561f
Original-Change-Id: Ifcbf95ffd6d13cae4e6864e0320ce6ce1cf3ae4d
Original-Signed-off-by: Samuel Holland <samuel@sholland.org>
Original-Reviewed-on: https://review.coreboot.org/20025
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://chromium-review.googlesource.com/531717
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
BUG=none
BRANCH=none
TEST=none
Change-Id: Idaefecddbf949525e2a26ca703257467bb24558e
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 901bdb3795
Original-Change-Id: Id4a079d868c5c806c769b5559833566e8a6a8a71
Original-Signed-off-by: Samuel Holland <samuel@sholland.org>
Original-Reviewed-on: https://review.coreboot.org/20077
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://chromium-review.googlesource.com/531716
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Some Super I/O PnP devices are detected by string matching the hardware
ID. Allow providing a custom HID to override the default generic one.
BUG=none
BRANCH=none
TEST=none
Change-Id: Ide39011430f1fade78505492cbffabc08e3e7618
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: d2a86da6e6
Original-Change-Id: I7793b7d53c9d94667675f9dee63358521ac8c4be
Original-Signed-off-by: Samuel Holland <samuel@sholland.org>
Original-Reviewed-on: https://review.coreboot.org/20076
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://chromium-review.googlesource.com/531715
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Some Super I/O logical devices have three I/O port ranges, such as the
GPIO on the IT8720F. Allow specifying a third I/O range. While here, fix
a typo in the I/O range description.
BUG=none
BRANCH=none
TEST=none
Change-Id: I6dc205501ab40d8c57cbef0ce35653ddd7d6ac7b
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: eeef6459a3
Original-Change-Id: Idad03f3881e0fbf2135562316d177972f931afec
Original-Signed-off-by: Samuel Holland <samuel@sholland.org>
Original-Reviewed-on: https://review.coreboot.org/20024
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://chromium-review.googlesource.com/531714
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
BUG=b:37088992
Change-Id: Iee15566aefaa9cbddcdaaec690fa24011f247d4c
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 0f1dc0ef74
Original-Change-Id: If0b495234d6e498d5c64ba4dd186440cd7a1c5c6
Original-Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/20121
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-on: https://chromium-review.googlesource.com/531713
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
