Florent Castelli
8c3552de74
cmake: Detect features at compile time
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Instead of relying on manually passed down flags from CMake,
we now have ppsspp_config.h file to create the platform defines for us.
This improves support for multiplatform builds (such as iOS).
2016-10-19 12:31:19 +02:00
Henrik Rydgard
7fee5abf9f
x86/x64: Don't use a separate code block for pregenerated functions, just like on ARM
2015-10-08 22:15:28 +02:00
Henrik Rydgård
c1b91ff5c1
x86: Add a way to eliminate some mov instructions.
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Not currently used yet.
2015-04-12 13:50:23 -07:00
Unknown W. Brackets
179e996b0b
jit: Discard unused regs before a syscall.
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This is a pretty minor optimization, though.
2015-03-01 11:08:59 -08:00
Chin
37f50a3792
Change to pass some arguments by reference
2015-03-01 16:49:00 +01:00
Unknown W. Brackets
77777e372d
x86jit: Use R15 when safe for the jit.
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This is virtually always safe.
2014-12-17 08:09:59 -08:00
Henrik Rydgard
05a8e2e35d
Some work towards being able to build two JITs together
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This will be useful for testing/debugging, but not there yet.
2014-12-13 21:13:54 +01:00
Unknown W. Brackets
afc779a824
jit: Add IN_RT to lwl/lwr and re-enable clobbering.
2014-12-08 21:17:01 -08:00
Unknown W. Brackets
bfe5f9276e
jit: Re-disable clobbered thing.
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No idea what's wrong...
2014-12-08 02:06:25 -08:00
Unknown W. Brackets
7734a4c912
jit: Re-enable clobbering with movz/movn support.
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Oops, these should be the only ones that take rd "in".
2014-12-08 01:29:41 -08:00
Unknown W. Brackets
119c1ef83e
jit: Disable clobber detection for now.
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Should still spill better. Something is wrong with flags detection, a
clobber to rd is incorrectly discarding outside a delay slot. Don't have
time now to look into it further.
2014-12-08 01:24:17 -08:00
Unknown W. Brackets
f817d49dfb
jit: Discard clobbered registers on spill.
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If we're spilling anyway, discard rather than saving.
2014-12-07 23:08:21 -08:00
Unknown W. Brackets
eeff110c0f
jit: Improve and unify GPR spill logic.
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Now the same logic on x86 and ARM, and handles HI/LO/etc. better.
2014-12-07 21:10:28 -08:00
Unknown W. Brackets
9dd6bb56bb
jit: Make available js_ and jo_ in regcaches.
2014-12-07 21:07:23 -08:00
Unknown W. Brackets
8dbd3c3b9c
x86jit: Don't lie about ZERO when it's not an imm.
2014-11-09 08:27:02 -08:00
Henrik Rydgard
a528921f3c
x86 JIT: EBX was free in 32-bit mode, let's use it in the regcache.
2014-11-09 12:55:17 +01:00
Henrik Rydgård
eab010a0c0
x86 JIT: Sacrifice a register for a pointer to the MIPS context. Shrinks emitted x86 code considerably.
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Nice in 64-bit, but might be a bit too much in 32-bit though... Needs testing.
2014-10-12 19:35:55 +02:00
Unknown W. Brackets
acad2e1763
x86jit: Cache fpcond in a register.
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Mostly to match armjit.
2014-06-28 00:38:55 -07:00
The Dax
21ce99cabd
Fix Unix-like builds.
2014-03-15 10:02:47 -04:00
Unknown W. Brackets
fd38b10ab6
x86jit: Rename imm funcs to match armjit.
2013-11-10 21:59:49 -08:00
Henrik Rydgard
5ad04a23f4
x86 jit: Rename BindToRegister to MapReg
2013-11-09 15:23:31 +01:00
Unknown W. Brackets
95c68ae1e7
Assert some unlikely buffer overflows.
2013-10-26 18:30:55 -07:00
Unknown W. Brackets
2751da1cec
Cut down on work in regcache init on x86.
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Very tiny tiny optimization for games, but 8-10% optimization for tests.
2013-09-19 00:29:50 -07:00
Henrik Rydgard
324cde5a79
Let's actually use the log category mechanism. A first step.
2013-09-07 21:19:21 +02:00
Unknown W. Brackets
97aa1a631e
Improve typesafety in the x86 regalloc.
2013-08-24 19:41:10 -07:00
Unknown W. Brackets
64c2ea86c0
Add a method to save the gpr/fpr state in jit.
2013-08-16 00:12:49 -07:00
Henrik Rydgard
3b9e6243eb
Only flush the required registers on function calls (only implemented for real on ARM)
2013-07-28 22:21:43 +02:00
Unknown W. Brackets
2d15eb2acd
Re-enable lwl/lwr/swl/swr on the x86 jit.
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Now correctly handling ECX on x64.
2013-07-06 01:21:52 -07:00
Unknown W. Brackets
64c42ffaf2
Fix some warnings generated by clang.
2013-02-24 10:23:31 -08:00
Henrik Rydgard
68991511ee
Split out the FPU reg cache into its own file too.
2013-01-26 01:34:19 +01:00
Henrik Rydgard
ad5e2b58c6
Separate the two regcaches before doing major surgery to FPURegCache.
2013-01-26 01:34:18 +01:00
Unknown W. Brackets
ce5f393fb8
Hit immediates in the ALU better and more simply.
2013-01-25 00:16:55 -08:00
Unknown W. Brackets
df06bb5624
Add some checks to make sure ZERO is never set.
2013-01-20 19:48:53 -08:00
Henrik Rydgard
93470e0c1f
Remove some old PowerPC references...
2013-01-05 19:52:11 +01:00
Henrik Rydgård
ed68dea0d5
JIT: Ignore branches in delay slots. Not sure if this is 100% correct.
2012-12-26 08:37:53 +01:00
Henrik Rydgard
64cc573703
Switch to "GPL 2.0 or later" for various reasons. I wrote most of the code I imported from Dolphin (which is GPL2-but-not-later), so it should be OK.
2012-11-04 23:24:00 +01:00
Henrik Rydgard
4f7ad15758
Add snapshot of the whole source code.
2012-11-01 16:19:01 +01:00