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jit: Re-enable clobbering with movz/movn support.

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Oops, these should be the only ones that take rd "in".
This commit is contained in:
Unknown W. Brackets 2014-12-08 01:29:41 -08:00
parent 119c1ef83e
commit 7734a4c912
3 changed files with 11 additions and 7 deletions
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3
Core/MIPS/ARM/ArmRegCache.cpp
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@ -295,8 +295,7 @@ allocate:
if (bestToSpill != INVALID_REG) {
// ERROR_LOG(JIT, "Out of registers at PC %08x - spills register %i.", mips_->pc, bestToSpill);
// TODO: Something is wrong with our flags or clobber detection. Disabling for now.
if (clobbered && false) {
if (clobbered) {
DiscardR(ar[bestToSpill].mipsReg);
} else {
FlushArmReg(bestToSpill);

12
Core/MIPS/MIPSAnalyst.cpp
View file

@ -750,12 +750,18 @@ namespace MIPSAnalyst {
return USAGE_INPUT;
// Clobbered, so not used.
bool clobbered = false;
if ((info & OUT_RT) && (MIPS_GET_RT(op) == reg))
return canClobber ? USAGE_CLOBBERED : USAGE_UNKNOWN;
clobbered = true;
if ((info & OUT_RD) && (MIPS_GET_RD(op) == reg))
return canClobber ? USAGE_CLOBBERED : USAGE_UNKNOWN;
clobbered = true;
if ((info & OUT_RA) && (reg == MIPS_REG_RA))
return canClobber ? USAGE_CLOBBERED : USAGE_UNKNOWN;
clobbered = true;
if (clobbered) {
if (!canClobber || (info & IS_CONDMOVE))
return USAGE_UNKNOWN;
return USAGE_CLOBBERED;
}
// Bail early if we hit a branch (could follow each path for continuing?)
if ((info & IS_CONDBRANCH) || (info & IS_JUMP)) {

3
Core/MIPS/x86/RegCache.cpp
View file

@ -174,8 +174,7 @@ X64Reg GPRRegCache::GetFreeXReg()
}
if (bestToSpill != INVALID_REG) {
// TODO: Something is wrong with our flags or clobber detection. Disabling for now.
if (clobbered && false) {
if (clobbered) {
DiscardRegContentsIfCached(xregs[bestToSpill].mipsReg);
} else {
StoreFromRegister(xregs[bestToSpill].mipsReg);