33 commits

Author	SHA1	Message	Date
rkx1209	5752d2fd74	Add support of UMOV/SMOV ops	2018-07-02 20:24:58 +09:00
rkx1209	825f5eec6b	Add support of FP/Int conversion ops	2018-07-02 15:48:33 +09:00
rkx1209	10933ba6ce	Fixed some bugs	2018-06-09 02:28:49 +09:00
rkx1209	540046ca96	Add support of Load/Store FP reg	2018-06-07 21:50:15 +09:00
rkx1209	f751c7d9e4	Add initial support of three same pair op	2018-06-05 00:24:19 +09:00
rkx1209	c4a5f1f425	Add initial support of three same logic op	2018-06-04 22:21:28 +09:00
rkx1209	3ab8fcdf7e	Add initial support of three same scalar op	2018-06-04 18:55:51 +09:00
rkx1209	d70da494b6	Add support of LDn/STn	2018-05-15 02:31:54 +09:00
rkx1209	f07834058e	Add support of some fp ops	2018-05-13 02:48:58 +09:00
rkx1209	1e19f441d7	Add software breakpoint support to gdbstub	2018-04-03 15:52:47 +09:00
rkx1209	e966853ac4	Add support of MSR/MRS, system registers	2018-03-23 12:36:23 +09:00
rkx1209	99a9efa369	Fixed some bugs of CPU emulation	2018-03-19 03:46:17 +09:00
rkx1209	b0e8996b59	Add support of 3src data proc(i.e MADD,SUB/MUL)	2018-03-18 20:12:48 +09:00
rkx1209	fce85f7a91	Add support of extract operations	2018-03-18 04:39:47 +09:00
rkx1209	0d9d94f1ec	Add support of Dup operation for SIMD	2018-03-17 05:50:14 +09:00
rkx1209	2507c00b96	Add support of bit extract operations	2018-03-11 23:19:31 +09:00
rkx1209	2052f8e8af	Removed writeback method from Interpreter	2018-03-09 20:45:07 +09:00
rkx1209	fbc62e9664	Removed sf from Load/StoreRegImm64	2018-03-07 23:00:27 +09:00
rkx1209	ad2cfdc816	Add support for load/store operation with register immediate	2018-03-05 07:18:11 +09:00
rkx1209	77e2611ca2	Add support for load/store operation with register offset	2018-03-05 04:28:03 +09:00
rkx1209	305b7f9349	Add support for load literal operation	2018-02-27 17:58:50 +09:00
rkx1209	405c2a8fbe	Add support for data processing with 2 src operation	2018-02-26 19:10:45 +09:00
rkx1209	8331633c7f	Add support for data processing with 1 src operation	2018-02-26 02:58:33 +09:00
rkx1209	806ac7dabf	Add support for conditional select operation	2018-02-25 22:55:39 +09:00
rkx1209	1cf270a02e	Add support for Conditional Compare ops	2018-02-17 19:47:04 +09:00
rkx1209	ff7f05054c	Add Bit operation support and miscs	2018-02-17 14:00:14 +09:00
rkx1209	d1952b4f46	Add deposit inst and dump function	2018-02-16 16:08:28 +09:00
rkx1209	60267e3627	Add LogicReg and Add/SubExtReg ops support to Disassembler	2018-01-04 09:01:57 +09:00
rkx1209	a5114f2087	Add Branch and Exception ops support to Disassembler	2018-01-02 23:32:03 +09:00
rkx1209	b00aea1a31	Add Unconditional branch op support to Disassembler	2018-01-02 03:55:24 +09:00
rkx1209	da24be5562	Add disassembler for all data proc imm operations	2018-01-01 04:18:56 +09:00
rkx1209	713b1e0818	Changed tab size	2017-12-31 18:20:26 +09:00
rkx1209	403560c766	Add Initial support for ARMv8 Disassembler ... I plan to add two kind of CPU emulatinon engine, 'Interpreter' and 'JIT binary translation'. So Disassembler should be independent from these engine.	2017-12-31 04:20:59 +09:00