This allows me to have a working coreinfo payload on DBE61 with coreboot-v3.
Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@686 f3766cd6-281f-0410-b1cd-43a5c92072e9
routine. That allows people to either adjust compression parameters
or scratchpad size.
Having a similar check during build time would be nice.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@684 f3766cd6-281f-0410-b1cd-43a5c92072e9
This makes doxygen documentation building work again.
Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@683 f3766cd6-281f-0410-b1cd-43a5c92072e9
have a superio.
With this patch, alix1c and MFGPT work fine. Still need to test on Alix2c3, but it
is likely it will work.
Thanks to Marc and Jordan for this one.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@682 f3766cd6-281f-0410-b1cd-43a5c92072e9
This program was originally written for OLPC and GX, and dumps all LX
registers used in coreboot.
I have preserved the indent structure since that gives some idea of the
scope of variables.
Of particular interest are the GLD variables, since they are always
listed as offsets in the manuals,
and computing the actual number (for use in rdmsr etc.) can be really
tricky.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@681 f3766cd6-281f-0410-b1cd-43a5c92072e9
kernel much happier.
As Marc suggested, having these devices all on the same IRQ seems to be fine.
I've tested performance - I get 11MB/sec copying data from eth2 to eth1, as
well as from eth2 to eth0 (which is on a different IRQ). That's 90% of
wirespeed which is what I'd expect to see.
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@680 f3766cd6-281f-0410-b1cd-43a5c92072e9
In theory the routing settings should work fine the same in DBE61 and DBE62.
Some of the settings are left as in v2 until testing can be done once RAM setup is fixed.
Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@679 f3766cd6-281f-0410-b1cd-43a5c92072e9
All of this is applies to comments only.
This is a trivial patch.
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@675 f3766cd6-281f-0410-b1cd-43a5c92072e9
This makes the network adapter work fully, and reduces problems on high traffic (e.g kernel oopses on fsck run over USB 2.0 HDD)
Many thanks for Peter Stuge for a lot of IRQ related help.
Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@673 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Marc Jones <marc.jones@amd.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@672 f3766cd6-281f-0410-b1cd-43a5c92072e9
understandable. Added benefit is complaining loudly for
unsupported 2 GB DIMM size.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested on the dbe62 up to and including Etherboot.
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@671 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Aaron Lwe <aaron.lwe@gmail.com>
Acked-by: Joseph Smith <joe@settoplinux.org>
Tested on v3 and
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
This patch also (accidently) includes
a simple fix for the null pointer reference problem. I had forgotten that
the fix was in there, but I will include it here and hope no one is too upset about
its inclusion.
git-svn-id: svn://coreboot.org/repository/coreboot-v3@669 f3766cd6-281f-0410-b1cd-43a5c92072e9
* Linutop 2 is not a DBE62
* ThinCan is the trademarked brand name for the thin client line, not an alternate "also known as" name
Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@668 f3766cd6-281f-0410-b1cd-43a5c92072e9
Thanks to Carl-Daniel for spotting this one, and Segher for providing the solution right away.
This is a trivial patch.
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@667 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@664 f3766cd6-281f-0410-b1cd-43a5c92072e9
There is still one outstanding issue - eth2 and the USB ports fight over IRQs.
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Marc Jones <marc.jones@amd.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@663 f3766cd6-281f-0410-b1cd-43a5c92072e9
This is necessary for the 'unwanted_vpci' field on geode-based boards.
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Jordan Crouse <jordan.crouse@amd.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@661 f3766cd6-281f-0410-b1cd-43a5c92072e9
This way we can fit a kernel and initramfs on the dongle's free ~3.75MB space
and have a debug system bootable right from inside the dongle. The start
address of the dongle is mem@0xffc00000 for FILO with 4MB minus ROM area
available.
This should be a no-op when not booting from the dongle.
Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@660 f3766cd6-281f-0410-b1cd-43a5c92072e9
mathematically impossible condition of a value being above and below the
specified range at the same time. Change it to check for out-of-range.
arch/x86/geodelx/geodelx.c:set_delay_control() is missing a break, it
will keep going and mess up DRAM timings.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Both changes look right to me.
Acked-by: Marc Jones <marc.jones@amd.com>
The raminit in v2 was fixed in r2899 | rminnich | 2007-10-26 with this
log:
> The lxraminit change fixes a bug (&& used instead of ||) [...]
> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
> Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@659 f3766cd6-281f-0410-b1cd-43a5c92072e9
It also fixes lzma compression in lar to fix the silent memory
corruption that was possible when files didn't compress well.
It adds some comments to both files and the file that calls them.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@658 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@657 f3766cd6-281f-0410-b1cd-43a5c92072e9
interpret whitespace as macro argument delimiter. Since the code is
preprocessed by gcc and the tokenizer may insert whitespace, that can
fail. http://sourceware.org/bugzilla/show_bug.cgi?id=669
This was committed as r3044 in coreboot v2.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Jordan Crouse <jordan.crouse@amd.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@654 f3766cd6-281f-0410-b1cd-43a5c92072e9
changed during run time. (trivial patch)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@651 f3766cd6-281f-0410-b1cd-43a5c92072e9
Set manual settings for dbe62 PLL; the auto settings are giving
slightly wrong values
Add call to dumplxmsr in dbe62 initram main()
Change dumplxmsr to void parameter
Add dumplxmsrs function to geodelx raminit support code
Correct spelling of CAS.
The big one: set spd variables correctly.
The not so big one: there is a bug in com2 enable I don't understand.
For now comment out two offending lines. The cs5536 debug prints
should be reduced later.
Change fuctory to factory. It's funny but confusing.
This patch also takes into account carl-daniel and uwe's comments.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@649 f3766cd6-281f-0410-b1cd-43a5c92072e9
LAR archive, the LAR utility will segfault. This is reproduced easily by
zerofilling the LAR, then adding anything to it.
Looking at the code, the reason is obvious:
lar_empty_offset() can return an error code (-1). None of the callers
check for an error code, they simply assume the return value is valid.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@647 f3766cd6-281f-0410-b1cd-43a5c92072e9
Tested on real hardware, some weirdness remains, probably related to
IRQ routing.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Marc Jones <marc.jones@amd.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@643 f3766cd6-281f-0410-b1cd-43a5c92072e9
removed the ELF loader from coreboot v3. This adds a Kconfig option
PAYLOAD_ELF_LOADER which builds the loader into v3. In order to make it a
little safer, I changed PAYLOAD_PREPARSE_ELF to PAYLOAD_NO_PREPARSE_ELF and
made that option depend on PAYLOAD_ELF_LOADER so that no one adds an unparsed
ELF without the loader.
One part that was strange to me was that I first tried adding elfboot.o and
archelfboot.o to the beginning of the list of object files. I added them to
the end of the list instead.
Myles
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@640 f3766cd6-281f-0410-b1cd-43a5c92072e9
path handling is built into lar, just use it.
Myles
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@639 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested on dbe62. I had to run cs5536/stage1.c through indent -kr -i8 because emacs is somehow
confused by parts of it. Weird. indent made some parts ugly, at least to my eyes. Oh well.
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@638 f3766cd6-281f-0410-b1cd-43a5c92072e9
