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Add back in missing line of DRAM info.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Marc Jones <marc.jones@amd.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@672 f3766cd6-281f-0410-b1cd-43a5c92072e9
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@ -63,6 +63,7 @@ static const struct spd_entry spd_table[] = {
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{SPD_MIN_RAS_TO_CAS_DELAY, 0x58},
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{SPD_tRRD, 0x3c},
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{SPD_tRP, 0x58},
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{SPD_PRIMARY_SDRAM_WIDTH, 8},
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{SPD_NUM_BANKS_PER_SDRAM, 0x4},
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{SPD_NUM_COLUMNS, 0x8},
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{SPD_NUM_DIMM_BANKS, 0x1},
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