Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Marc Jones <marc.jones@amd.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@702 f3766cd6-281f-0410-b1cd-43a5c92072e9
parameter to two functions.
2. geodelx.h: define DRAM_TERMINATED and DRAM_UNTERMINATED constants
3. dbe62/initram.c: move to auto PLL control, so set MANUALCONF to 0
4. all other initram.c: set up calls to cpu_reg_init with proper
TERMINATED/UNTERMINATED constants.
builds for dbe62. The auto PLL strapping is tested and works.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@699 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Marc Jones <marc.jones@amd.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@698 f3766cd6-281f-0410-b1cd-43a5c92072e9
Note: You MUST have the later AMD VSA code that does not call bios
interrupts. If you use the older code, your boot will hang at this
point:
buf[0x20] signature is b0:10:e6:80
Call real_mode_switch_call_vsm
With post code 10
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@616 f3766cd6-281f-0410-b1cd-43a5c92072e9
before they can be #included. That is completely counter-intuitive. Add
necessary #includes to the header files themselves.
Fix a few cases where nonexisting files were #included.
Compile tested on Qemu and Alix1C.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@611 f3766cd6-281f-0410-b1cd-43a5c92072e9
Tested on Qemu and Geode LX.
Benefits of this patch:
- printk() now works directly after printk_buffer_init(), even before
the serial port is set up.
- If all you want is a log, you don't have to bother with serial output.
- A payload can read and analyze the log.
- You can build on this and buffer log until serial is available, then
flush the messages buffered so far.
The printk buffer is configurable with a default-on Kconfig variable.
If you want to dump the buffer from the Qemu monitor after CAR has been
disabled, use this command:
memsave 0x90000 65536 memdump.bin
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Marc Jones <marc.jones@amd.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@590 f3766cd6-281f-0410-b1cd-43a5c92072e9
centrally from Kconfig, but keep the Kconfig variables hidden.
That way, they are available everywhere, you don't have to try to guess
where they are set, and they come with help text if you look at
arch/x86/Kconfig.
No semantic changes, although some of the settings really could use an
overhaul.
This also is a requirement for my printk buffer patch.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@587 f3766cd6-281f-0410-b1cd-43a5c92072e9
from v2 to install them. Linux boots fine and all interrupts
seem to work correctly -- the network comes up, USB hot plug works,
I can mount the USB disk, etc.
To enable pirq tables for a given mainboard, simply add the
select PIRQ_TABLE (see below) to the Kconfig for that board.
Again, this code builds and boots linux on the alix1c.
I think, with this change, we are very close to moving ALL LX boards to
v3 and deprecating v2. The major remaining fix is to add an empty LAR
entry to fill empty space in LAR and speed up the LAR file search
process.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Index: include/tables.h
Add prototype, conditioned on CONFIG_PIRQ_TABLE
Index: util/x86emu/vm86.c
Comment out 'debug trap' code that scribbles vectors at 0x4000.
I don't know why this is here, but I'd like to leave it #if'ed out --
somebody, at some point, thought we needed it. To reenable, we will need
to move stage2 code or these magic vectors.
Index: arch/x86/Makefile
Add support for conditional compilation of pirq support code.
Index: arch/x86/pirq_routing.c
Add this file from v2.
Index: arch/x86/archtables.c
Add call to write_pirq_routing_table (controlled by #ifdef
CONFIG_PIRQ_TABLE)
Index: arch/x86/Kconfig
Add new config variable: PIRQ_TABLE
Index: device/device.c
Fix some trivial bugs.
Index: mainboard/pcengines/alix1c/Makefile
Add pirq table code for stage2
Index: mainboard/pcengines/alix1c/dts
Modify dts to properly set southbridge variables
Index: mainboard/pcengines/alix1c/irq_tables.c
Add code from v2 for the alix1c.
Index: mainboard/pcengines/Kconfig
Add 'select PIRQ_TABLE'
Index: include/arch/x86/pirq_routing.h
Add include file from v2.
Remove all the SLOTCOUNT nonsense. This hack was only needed
for a very early version of gcc 3.x, where they screwed up the
creation of struct members that used the [] syntax for variable-length
array at the end of the struct.
Index: include/device/pci.h
Add prototype
git-svn-id: svn://coreboot.org/repository/coreboot-v3@582 f3766cd6-281f-0410-b1cd-43a5c92072e9
Due to some problems with PCI transactions, Geode LX needs the ROM cache properties to be write-serialize + cache disabled by runtime. More details below.
Add mainboard_pre_payload() call to each mainboard as the final coreboot function before the payload is called by stage1.
Note that this patch also grows the bootblock from 16K to 20K to make room for mainboard_pre_payload().
"The problem is a transaction depth issue and bottlenecks inside the GX
and LX that go across PCI. The conditions are very complicated but it
comes down to we need write serialization for writes to PCI. If you
look in the data book you can't have write serialization and the cache
enabled on a given area. During coreboot we don't have to worry about
a write or a PCI bus master so I think we can enable caching the ROM.
After coreboot we can't be sure what will happen in the system so we
need to set it up to be safe. For example flashrom just clears the
write protect bit. If the cache were enabled (no write serialization)
and flashrom was writing the ROM we would be in a precarious position.
A PCI bus master doing a read or a write that has a hit on a tag
would cause enough bottleneck conditions that it might hit the bug. We
could change flashrom but that doesn't help other tools. We need to
leave the system in a safe state. Also, caching the ROM after it is no
longer used doesn't make much sense. So, we need a call just before
the payload runs to clean up the system."
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@573 f3766cd6-281f-0410-b1cd-43a5c92072e9
- I left LB_TAG_ intact because they are used by the payloads
- file renames are still missing. see next commit
- some lb_ renames might be missing. feel free to provide patches.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@564 f3766cd6-281f-0410-b1cd-43a5c92072e9
return from disable_car.
- Move the cache as ram memory to 0x80000 instead of 0xc8000, as the C
range is really tricky to get right :-)
- Modify the geode disable_car to ensure the cache is flushed to ram on
the wbinvd.
With these changes, I get a payload loaded.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@546 f3766cd6-281f-0410-b1cd-43a5c92072e9
available to C.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@543 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@519 f3766cd6-281f-0410-b1cd-43a5c92072e9
- Simplify lots of code, especially msr-related code.
- Move struct msrinit declaration into msr.h as we use it quite often
and there's no use to duplicate it again and again in each file.
- Remove unrequired variable usage (e.g. numEnabled, msrnum, val, port).
- Remove useless comments.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Marc Jones <marc.jones@amd.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@464 f3766cd6-281f-0410-b1cd-43a5c92072e9
- Use 'static' for functions and structs which are not meant to be public.
- Use 'const' for variables which are not meant to be modified.
- Move some prototypes into legacy.h where they belong.
- Drop prototypes for non-existing functions.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Marc Jones <marc.jones@amd.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@460 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@435 f3766cd6-281f-0410-b1cd-43a5c92072e9
Use legacy.h PIT defines in Geode code.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@433 f3766cd6-281f-0410-b1cd-43a5c92072e9
header. Some other minor fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@431 f3766cd6-281f-0410-b1cd-43a5c92072e9
* drop silly code when not using SMP
* fix device/device.c
* drop spinlock_t, use struct spinlock instead.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
one kitten died already! ;-)
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@429 f3766cd6-281f-0410-b1cd-43a5c92072e9
the Linux kernel (as far as possible). The code is a lot simpler
and shorter now.
Also, add cpu_relax() (which is also part of the Linux file) which
could be useful for busy-loops (but is currently not used).
Drop the cpu_relax() from spinlock.h as it's not spinlock related in any way.
The code builds, and works in QEMU, but is not tested on hardware.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@423 f3766cd6-281f-0410-b1cd-43a5c92072e9
* make constructor an initializer.
* fix memory leak/code flow error in current code
* add spinlocking
* drop malloc and use new_device for device allocation instead.
* add CONFIG_SMP as it is needed by spinlocks and soon other stuff.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@418 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@409 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@408 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@396 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@393 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@378 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@377 f3766cd6-281f-0410-b1cd-43a5c92072e9
should go here. This file taken from V2.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@365 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@335 f3766cd6-281f-0410-b1cd-43a5c92072e9
all header files.
This closes#40, as I think we don't need to invest time to fix this in
LinuxBIOSv2, but only in LinuxBIOSv3.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@332 f3766cd6-281f-0410-b1cd-43a5c92072e9
builds but is not tested.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@323 f3766cd6-281f-0410-b1cd-43a5c92072e9
- Everything in include/cpu/generic/x86/arch/* goes into
include/arch/x86 now.
- include/cpu/generic/x86/div64.h moves into include/arch/x86, too.
- The former include/cpu/generic/x86/arch/elf.h moved to
include/arch/x86/archelf.h, as elf.h already exists in include/
and we must prevent a name clash.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@314 f3766cd6-281f-0410-b1cd-43a5c92072e9
