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62 commits

Author SHA1 Message Date
Henrik Rydgård
23aedf1e63 More sensible approach to the sc problem that broke Beats 2023-09-11 16:07:21 +02:00
Henrik Rydgård
accd9b1f2c sc instruction: Make sure the rt register is mapped. Fixes Beats. 2023-09-11 14:18:58 +02:00
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9a8ac1fe08 x86jit: Implement ll/sc. 
The point here is that breakpoints now work for ll and sc.
 2023-07-29 18:49:45 -07:00
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df2462b1d9 irjit: Implement ll/sc. 
These occur more than I expected in LittleBigPlanet while loading.
 2023-07-29 17:57:44 -07:00
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0f5859510e x86jit: Simplify memcheck handling. 
Now it's mostly the same as the other jits.
 2023-04-12 01:07:48 -07:00
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4178f09e57 Build: More consistently avoid _M_ defines. 
We use PPSSPP_ARCH in several places already, this makes it more complete.
 2021-03-02 21:49:21 -08:00
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f32f89dd90 Global: Remove some unused variables. 2021-02-15 11:59:45 -08:00
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5d60fa0d0d Common: Maintain C++11 support in sign extend. 2021-01-31 08:44:02 -08:00
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1b00da2f3a Common: Sign extend w/func not chained casts. 
Should be clearer to read and easier to get right.
 2021-01-31 01:25:52 -08:00
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d3c06266c5 jit: Fix conditional disable flags. 2021-01-09 11:50:32 -08:00
Henrik Rydgård
4c034ce988 Make all the Comp_Cache implementations the same. 
We have the informative comments in the interpreter implementation
anyway.
 2020-10-16 09:13:41 +02:00
Henrik Rydgård
c5e0b799d9 Remove category from _assert_msg_ functions. We don't filter these by category anyway. 
Fixes the inconsistency where we _assert_ didn't take a category but
_assert_msg_ did.
 2020-07-19 20:33:25 +02:00
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419c1fbd73 Jit: Respect flags for jit types and features. 
Left some free space for more.
 2019-02-03 14:57:08 -08:00
Henrik Rydgård
884aef6603 SafeMem: Remove the "far" optimization that saves 3 bytes sometimes but is really dangerous and not worth the complexity. 2017-08-30 09:58:30 +02:00
Florent Castelli
8c3552de74 cmake: Detect features at compile time 
Instead of relying on manually passed down flags from CMake,
we now have ppsspp_config.h file to create the platform defines for us.
This improves support for multiplatform builds (such as iOS).
 2016-10-19 12:31:19 +02:00
Henrik Rydgård
a897723e6a Separate out jit reading nearby instructions. 
This makes it easier to use an IR for these things, or remove them.
 2015-04-11 00:53:24 -07:00
Henrik Rydgård
6bf2c02908 x86 jit: Allow storing all imms directly without bouncing to a register, not just zero. 2014-12-23 22:25:53 +01:00
Henrik Rydgard
51d55bd645 Namespacing cleanup (it's bad to do "using namespace" in a header) 2014-12-07 14:44:15 +01:00
Henrik Rydgard
53b5d331b4 Assorted minor optimizations 2014-11-17 21:21:44 +01:00
Henrik Rydgard
bfcd3690b6 x86 jit: Fix+enable quaternion product, optimize "sw zero, *" 2014-11-16 18:37:38 +01:00
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e3a04aa2d2 x86jit: Preload sp and similar regs used often. 
This can help us avoid using a temporary.

Very tiny performance improvement.
 2014-10-12 14:53:56 -07:00
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6ccae8f5a7 x86jit: Use a faster safemem fallback. 
Really helps performance in games that use uncached addresses a lot,
without really impacting performance of most games which don't.

Of course, fastmem is faster.
 2014-05-06 08:05:12 -07:00
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2347498667 x86jit: Use templates to avoid some void * casts. 
Makes it a bit cleaner and potentially safer.
 2014-01-18 09:57:13 -08:00
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455a7e090d Compile the cache instruction to nothing. 
Was showing up in a few profiles, does nothing currently.
 2013-11-10 14:38:10 -08:00
Henrik Rydgard
5ad04a23f4 x86 jit: Rename BindToRegister to MapReg 2013-11-09 15:23:31 +01:00
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97aa1a631e Improve typesafety in the x86 regalloc. 2013-08-24 19:41:10 -07:00
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109ad17ac6 Use a typesafe struct for opcodes. 
Also, correctly read delayslots using Read_Instruction on ARM.
 2013-08-24 15:36:24 -07:00
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286c153c6a Fix memchecks for halfwords and bytes. 
Before it was doing the range on a 4 byte read, which would trip a
memcheck that wasn't actually being hit if the byte of halfword was
unaligned.
 2013-07-06 13:15:48 -07:00
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2d15eb2acd Re-enable lwl/lwr/swl/swr on the x86 jit. 
Now correctly handling ECX on x64.
 2013-07-06 01:21:52 -07:00
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1c9086617a DISABLE the swr/swl and friends for now. 
Broke Disgaea on x64 only, not sure why right now.
 2013-07-05 02:53:15 -07:00
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e27ab6fa11 Add swl/swr to the x86 jit. 2013-07-04 17:34:56 -07:00
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203daf955b Implement lwl/lwr in the x86 jit. 2013-07-04 17:30:36 -07:00
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2d6a730cac Add some basics for memory checks to x86 jit. 
Specifically, we will need to be able to bail in delayslots,
and we will need to know the size of the access (useful anyway.)
 2013-03-09 02:41:46 -08:00
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f6f2927526 Add curlies around DISABLE/CONDITIONAL_DISABLE. 2013-02-15 08:35:33 -08:00
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f777c872e6 Jit unaligned reads/writes. 
This mostly just improves perf on debug, not really on the map for release.
 2013-02-02 13:12:34 -08:00
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b77ce99d01 Oops, no slow read for immediates usually. 2013-01-26 09:27:52 -08:00
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9cd5836b85 Rename WriteFinish() to Finish() is safe mem. 
It's nothing to do with writing.
 2013-01-26 09:09:47 -08:00
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3e419f513a Refactor jit safe memory reads without dup code. 
But, maybe too automagical...
 2013-01-26 08:42:34 -08:00
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b7ef3e7bef Make sure to log / check bad immediate mem access. 
Although, theoretically, this should never happen.
Also, definitely time to refactor.
 2013-01-25 23:06:43 -08:00
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3418383917 Immediately break on bad mem access in jit slowmem. 2013-01-25 22:52:51 -08:00
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f5963df0dc Optimize write to a single x64 op too. 2013-01-20 13:06:19 -08:00
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e8dc99328a Avoid using EAX as a temporary where possible. 
All the regs should be indirect addressing compatible.  So if it's
in a reg, let's use that instead of EAX.
 2013-01-20 12:57:14 -08:00
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eaa24ee047 Use EDX as a temporary for sb, and jit it. 2013-01-20 12:25:08 -08:00
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30f6a4ba87 Fix stupid stupid typo breaking slowmem jit. 2013-01-20 09:39:13 -08:00
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53600161ba Don't write anything to a bad static pointer. 
Not sure what came over me...
 2013-01-20 00:19:18 -08:00
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e78223d2c0 Since flipping the op is easy, also do lb/lh. 2013-01-19 16:25:57 -08:00
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5e8f1917ee Fix 64-bit memory dereferencing. 2013-01-19 16:25:57 -08:00
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90e6f0b7df Optimize static memory read/writes in jit as well. 
Like the arm jit does.
 2013-01-19 16:25:56 -08:00
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c64966c16e Oops, lost the CONDITIONAL_DISABLE. 2013-01-19 16:25:56 -08:00
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37fb64ac83 Fast path scratchpad too, shouldn't be expensive. 2013-01-19 11:11:45 -08:00