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2326 commits

Author SHA1 Message Date
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6f87987e7b interp: Correct prefixes on vdot/vhdp. 2019-03-31 17:12:21 -07:00
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b24f84d1a2 interp: Handle prefixes on matrix init ops. 2019-03-31 17:11:24 -07:00
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59905de719 interp: Correct vsgn out of swizzle bounds. 2019-03-31 17:10:51 -07:00
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85ff32eed1 interp: Handle vsgn prefixing. 
One could compare against 3 using this, it just generates zeros to compare
with.
 2019-03-31 17:10:51 -07:00
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a5214d0b1a Jit: Ignore high bit in vmfvc/vmtvc. 2019-03-31 17:09:55 -07:00
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b881a689c4 interp: Ignore high bit in vmfvc/vmtvc. 
Both 0 and 128 read/write the S prefix, for example.
 2019-03-31 17:09:55 -07:00
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dffa238611 interp: Handle invalid swizzle in vsge/vslt. 2019-03-31 15:05:43 -07:00
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dfd8094f21 interp: Implement vcrs prefixes and sizes. 
It only makes sense as triple, but it can be used as quad/single/etc. and
has consistent and sane results.
 2019-03-31 15:05:15 -07:00
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fa7ac7bc64 interp: Correct simple vmov variant prefixing. 2019-03-31 15:01:28 -07:00
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01aebe54b9 interp: Correct vdet prefix handling. 2019-03-31 15:01:11 -07:00
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cc58d0d3a3 interp: Correct prefixes in vsrt ops. 2019-03-31 15:00:12 -07:00
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f2be0cb083 interp: Correct prefixes for vsbn/vsbz. 2019-03-31 13:52:59 -07:00
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175ceef583 interp: Cleanup vsocp size handling. 2019-03-31 13:52:07 -07:00
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4a2f8a74dc interp: Correct size handling for vi2x ops. 2019-03-31 13:51:12 -07:00
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b75690787e interp: Correct swizzle on vx2i ops. 2019-03-31 13:51:12 -07:00
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68cdcba6c5 interp: Don't write lane 2 on single colorconv. 
Not that it's valid to use the op with that size anyway.
 2019-03-31 13:51:12 -07:00
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5736b1be2a interp: Correct some negative invalid zero cases. 
In these cases, the input value wires to +0.  Also, transposed the values
in a comment (oops.)
 2019-03-31 13:45:37 -07:00
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aa998b815c interp: Force vscmp result of invalid to zero. 
Some other ops do this, but mostly only that do plus or minus.
 2019-03-31 13:41:48 -07:00
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c7e83cd4fa interp: Correct vfim for -inf and similar. 
Was dropping the sign bit before for inf and nan.
 2019-03-31 13:41:48 -07:00
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5749ae09d0 interp: Correct vmfvc register behavior. 
The target and source registers were completely wrong.
 2019-03-31 13:41:48 -07:00
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b2e024025f interp: Handle wrong sizes of vf2h/vh2f. 
Probably not ever used, but they have consistent behavior.
 2019-03-31 13:41:48 -07:00
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aceb0a8244 interp: Correct vrnd prefix handling. 
We don't match random values perfectly anyway, but at least we should vary
at the right times.
 2019-03-31 13:41:48 -07:00
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dfc2449f35 interp: Match actual vdiv prefix handling. 2019-03-31 13:41:48 -07:00
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af3ed69144 interp: Mask moves to vfpu ctrl. 
These bits of the registers can't be written.
 2019-03-31 10:37:07 -07:00
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2a5d4e577d interp: Handle NAN more correctly in vscmp. 2019-03-31 10:37:07 -07:00
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db28c61272 interp: Handle flush prefixes slightly better. 2019-03-31 10:37:07 -07:00
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d40ac043d4 interp: Handle prefixes for Vmmov/Vmmul/Vmscl. 
I doubt any actual code uses this, but we have some tricky VFPU bugs left,
so just trying for maximum accuracy in the interpreter.
 2019-03-31 10:37:07 -07:00
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26b1368f7b interp: Handle vrot prefixes mostly correctly. 
Still some issues with 1/2 results and negate on swizzle.
 2019-03-31 10:37:07 -07:00
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8fd8dce185 interp: Use a helper to generate prefix consts. 
This makes more logical sense that using the VFPU_SWIZZLE and VFPU_ABS
macros to select the constant, although that's how the bits work.
 2019-03-31 10:33:26 -07:00
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b86a6af364 interp: Properly apply mask on single lane ops. 
When using something like vadd.s, we should still be applying the mask.
Mainly should only matter if masks are set in a conditional, or if games
nop out instructions.
 2019-03-31 10:13:28 -07:00
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1936e8c4d1 interp: Generate constants using prefixes. 
This way they properly respect negate in the S prefix.
 2019-03-31 10:13:28 -07:00
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0be3213151 interp: Correct vscl prefix handling. 2019-03-31 10:13:28 -07:00
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ec1dae57eb interp: Fix vbfy prefix handling. 2019-03-31 10:09:18 -07:00
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d5273f589a interp: Mask value in vpfxd. 
The actual register ends up with only the lower 12 bits, which makes sense
since those are the only ones that do anything.
 2019-03-31 08:23:36 -07:00
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9d1d4473e8 interp: Confirm vi2f/vf2i prefix handling. 2019-03-31 08:22:52 -07:00
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30223cb17f interp: Apply T prefix to D in vcmov. 2019-03-31 08:22:15 -07:00
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fef8e71b8f interp: Correct behavior for matrixes with size=1. 
Games don't (shouldn't?) actually use 1x1 matrices, but they seem to have
predictable behavior in matrix ops.
 2019-03-31 08:21:29 -07:00
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cfab70f149 interp: Handle abs/neg on nan values better. 
`fabsf` was altering other bits.
 2019-03-31 08:18:49 -07:00
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7dc775e54f IR: Use interp for unhandled prefix cases. 
The interpreter is not changed yet, so in theory this shouldn't change
behavior.
 2019-03-31 08:17:11 -07:00
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4c3aa841d3 IR: Correct vmmul optimizations. 
It's a bit confusing since it's not D = S*T, but rather D = S'*T.
 2019-03-23 15:31:10 -07:00
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aff1d8e8b2 interp: Implement vsbz and vlgb. 
Not sure any games actually use them, but good to have the remaining vfpu
ops all implemented.
 2019-02-23 15:08:49 -08:00
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520f850e09 Jit: Correct VFPU prefix eating flags. 
Verified by tests.  Also, confirmed that the old vxbz encoding had no
output, but the new position (as used by gas) does.
 2019-02-23 15:08:49 -08:00
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179ec61815 interp: Correctly handle vsocp prefixes. 
Very similar to vsop, just with a bit more fixed values.
 2019-02-23 10:05:13 -08:00
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6178a1fb33 Jit: Correct vocp prefix handling. 
See #5549.  Matches tests for various prefix settings.
 2019-02-23 09:15:26 -08:00
Henrik Rydgård
c80dd44da8 ARM/ARM64: Ignore invalid immediate addresses in delay slots, which may be conditional. 
Should do something in x86's safe mem too, but leaving for later.

Replaces #11824
 2019-02-23 10:15:09 +01:00
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d7f40afd9d interp: Correct vocp prefix handling. 
Also, guess that vsocp also applies prefixes.  See #5549.
 2019-02-21 19:02:16 -08:00
Henrik Rydgard
a802adb1f6 Add simple UI for JIT feature disable flags 2019-02-04 13:00:08 +01:00
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419c1fbd73 Jit: Respect flags for jit types and features. 
Left some free space for more.
 2019-02-03 14:57:08 -08:00
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46649a218e Core: Add flags to disable jit features. 
Not actually disabling yet, just setup.
 2019-02-03 13:58:24 -08:00
pent0
4a53853f79 Update UWP port 2018-12-10 20:55:07 +07:00