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interp: Mask value in vpfxd.

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The actual register ends up with only the lower 12 bits, which makes sense
since those are the only ones that do anything.
This commit is contained in:
Unknown W. Brackets 2019-03-10 20:28:01 -07:00
parent 9d1d4473e8
commit d5273f589a
5 changed files with 7 additions and 4 deletions
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2
Core/MIPS/ARM/ArmCompVFPU.cpp
View file

@ -100,7 +100,7 @@ namespace MIPSComp
js.prefixTFlag = JitState::PREFIX_KNOWN_DIRTY;
break;
case 2: // D
js.prefixD = data;
js.prefixD = data & 0x00000FFF;
js.prefixDFlag = JitState::PREFIX_KNOWN_DIRTY;
break;
default:

2
Core/MIPS/ARM64/Arm64CompVFPU.cpp
View file

@ -93,7 +93,7 @@ namespace MIPSComp {
js.prefixTFlag = JitState::PREFIX_KNOWN_DIRTY;
break;
case 2: // D
js.prefixD = data;
js.prefixD = data & 0x00000FFF;
js.prefixDFlag = JitState::PREFIX_KNOWN_DIRTY;
break;
default:

3
Core/MIPS/IR/IRCompVFPU.cpp
View file

@ -129,6 +129,7 @@ namespace MIPSComp {
void IRFrontend::Comp_VPFX(MIPSOpcode op) {
CONDITIONAL_DISABLE(VFPU_XFER);
// This is how prefixes are typically set.
int data = op & 0xFFFFF;
int regnum = (op >> 24) & 3;
switch (regnum) {
@ -141,7 +142,7 @@ namespace MIPSComp {
js.prefixTFlag = JitState::PREFIX_KNOWN_DIRTY;
break;
case 2: // D
js.prefixD = data;
js.prefixD = data & 0x00000FFF;
js.prefixDFlag = JitState::PREFIX_KNOWN_DIRTY;
break;
default:

2
Core/MIPS/MIPSIntVFPU.cpp
View file

@ -183,6 +183,8 @@ namespace MIPSInt
{
int data = op & 0xFFFFF;
int regnum = (op >> 24) & 3;
if (regnum == VFPU_CTRL_DPREFIX)
data &= 0x00000FFF;
currentMIPS->vfpuCtrl[VFPU_CTRL_SPREFIX + regnum] = data;
PC += 4;
}

2
Core/MIPS/x86/CompVFPU.cpp
View file

@ -87,7 +87,7 @@ void Jit::Comp_VPFX(MIPSOpcode op)
js.prefixTFlag = JitState::PREFIX_KNOWN_DIRTY;
break;
case 2: // D
js.prefixD = data;
js.prefixD = data & 0x00000FFF;
js.prefixDFlag = JitState::PREFIX_KNOWN_DIRTY;
break;
}