Henrik Rydgård
9e41fafd0d
Move math and some file and data conversion files out from native to Common.
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Buildfixing
Move some file util files
Buildfix
Move KeyMap.cpp/h to Core where they belong better.
libretro buildfix attempt
Move ini_file
More buildfixes
2020-10-04 09:12:46 +02:00
Henrik Rydgård
4d3ec20082
ByteSwap.h results in a file name collision on some systems with byteswap.h. Fix this by merging it into BitSet.h.
2020-09-30 00:09:13 +02:00
Henrik Rydgård
d9edc68966
Remove unnecessary use of thread local storage
2020-09-29 15:51:51 +02:00
Unknown W. Brackets
6b8f7294b3
Global: Remove ARM64 define.
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Was barely used anymore, and some users are specifying it when it's not
the case, so better to detect consistently.
2020-08-29 08:45:50 -07:00
Henrik Rydgård
c41f875df4
Remove base/logging.h in a whole lot more places.
2020-08-15 19:09:00 +02:00
Henrik Rydgård
6f1915110f
Remove base/logging from UI and more
2020-08-15 19:08:54 +02:00
Henrik Rydgård
b43698a13d
Remove most instances of base/logging.h from Common, Core, GPU, more
2020-08-15 19:08:44 +02:00
Unknown W. Brackets
4b4e3432cd
SaveState: Split Do() into a separate header.
2020-08-10 08:03:41 +00:00
Henrik Rydgård
c5e0b799d9
Remove category from _assert_msg_ functions. We don't filter these by category anyway.
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Fixes the inconsistency where we _assert_ didn't take a category but
_assert_msg_ did.
2020-07-19 20:33:25 +02:00
Henrik Rydgård
6f97c3d422
Various platform buildfixes
2020-07-14 09:25:59 +02:00
Henrik Rydgard
c988d42b04
ARM/ARM64 instruction analysis, hook up to handler
2020-07-14 09:25:45 +02:00
Unknown W. Brackets
ae224b3893
jit: Add some basic checks in armjit/arm64jit.
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Just the simple (and unlikely) case so far...
2020-07-13 01:49:19 -07:00
Unknown W. Brackets
7910b4029a
arm64jit: Track writable and non-writable pointers.
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Switch uses different memory regions. We can handle this, might as well
cleanup some const abuse.
2020-05-17 00:15:12 -07:00
Henrik Rydgård
f65a71d6d8
Compat: Option to use accurate dotprod for VMMUL.
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Eliminates Tekken 6 leg shaking.
2019-08-05 11:44:52 -07:00
Henrik Rydgård
f49999efca
Revert "ARM64 vmmul experiment: Disable if S and T matrices overlap."
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This reverts commit c4d26dcb10
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2019-06-06 09:34:23 +02:00
Henrik Rydgård
649b7a5671
ARM64 vmmov experiment: Reduce precision by using FMUL+FADD instead of FMADD. May help #12082 and thus also #11179 and #9843 .
2019-06-05 00:02:32 +02:00
Henrik Rydgård
c4d26dcb10
ARM64 vmmul experiment: Disable if S and T matrices overlap.
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If this fixes anything in #12082 , we have a regalloc bug I guess...
2019-06-04 22:24:19 +02:00
Henrik Rydgård
7853c90abb
JIT: Split VFPU_MTX disable options. To help with #9843
2019-06-03 23:28:15 +02:00
Unknown W. Brackets
c773359095
arm64jit: Tweak matrix vfpu overlap detect, etc.
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Tried making changes to them to guess at issues for #9843 , but didn't find
any. Still, I think these changes are worthwhile, if small.
2019-06-02 22:10:20 -07:00
Unknown W. Brackets
1358a80aa6
arm64jit: Fix avoidLoad handling for fpu regs.
2019-06-02 22:03:06 -07:00
Henrik Rydgård
55b4b4b9e3
Style fix
2019-06-02 16:22:19 +02:00
Henrik Rydgård
6fd40332fd
JitDisable: Add option to disable regalloc across instructions (flush after every instruction)
2019-06-02 16:06:10 +02:00
M4xw
b9352354c9
Masked PSP Memory support for the AArch64 Dynarec
2019-04-15 12:07:57 +02:00
Unknown W. Brackets
a5214d0b1a
Jit: Ignore high bit in vmfvc/vmtvc.
2019-03-31 17:09:55 -07:00
Unknown W. Brackets
5749ae09d0
interp: Correct vmfvc register behavior.
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The target and source registers were completely wrong.
2019-03-31 13:41:48 -07:00
Unknown W. Brackets
d5273f589a
interp: Mask value in vpfxd.
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The actual register ends up with only the lower 12 bits, which makes sense
since those are the only ones that do anything.
2019-03-31 08:23:36 -07:00
Unknown W. Brackets
6178a1fb33
Jit: Correct vocp prefix handling.
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See #5549 . Matches tests for various prefix settings.
2019-02-23 09:15:26 -08:00
Henrik Rydgård
c80dd44da8
ARM/ARM64: Ignore invalid immediate addresses in delay slots, which may be conditional.
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Should do something in x86's safe mem too, but leaving for later.
Replaces #11824
2019-02-23 10:15:09 +01:00
Unknown W. Brackets
d7f40afd9d
interp: Correct vocp prefix handling.
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Also, guess that vsocp also applies prefixes. See #5549 .
2019-02-21 19:02:16 -08:00
Unknown W. Brackets
419c1fbd73
Jit: Respect flags for jit types and features.
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Left some free space for more.
2019-02-03 14:57:08 -08:00
Unknown W. Brackets
4c3fe47372
jit: Remove unused breakpoint code.
2018-06-06 17:31:56 -07:00
Unknown W. Brackets
eb4b59b530
arm64jit: Enable breakpoints.
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Memory breakpoints not yet really tested.
2018-06-06 17:31:56 -07:00
Unknown W. Brackets
4861cadb79
arm64jit: Fix reg size in jr delay slot path.
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Can't use the 64-bit reg.
2018-04-04 06:58:12 -07:00
Unknown W. Brackets
ab809bd19e
jit: Apply hasSetRounding at compile time.
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Otherwise, the block will be executed with the wrong rounding mode the
first time rounding is set. This could be important if it was set for a
single operation.
This is only a problem the first time it's set.
2018-04-01 10:36:16 -07:00
Unknown W. Brackets
09e307b097
arm64jit: Update rounding mode on thread switch.
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Since fcr31 is per-thread, we must update jit state when it changes.
This also fixes the rounding mode on load state and jit/interp switch.
2018-04-01 10:12:32 -07:00
Unknown W. Brackets
7d3fac2b4b
arm64jit: Fix a case of R() on unmapped.
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But this probably means a game crash anyway...
Attempting to fix #10843 .
2018-03-31 22:34:05 -07:00
Unknown W. Brackets
4fbb68d505
arm64jit: Update some comments.
2018-03-31 21:03:23 -07:00
Henrik Rydgård
468b830bec
Show IR disassembly in JIT Compare screen
2018-01-04 12:23:23 +01:00
Unknown W. Brackets
d8d174fa2b
arm64jit: Avoid spilling an extra reg for lwl/lwr.
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It's only needed for swl and swr.
2018-01-01 08:38:10 -08:00
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8ffb0101fe
jit: Report blocks with uneaten VFPU prefixes.
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There may be options to avoid, like continuing these blocks, especially if
they're likely or something.
2018-01-01 08:38:10 -08:00
Unknown W. Brackets
9ff812b313
arm64jit: Negate in ADDI2R/SUBI2R as well.
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Should've done this at the same time as CMN. It's not as common, mostly
catches addu calls, but it's good to have these generic for other uses.
2017-12-30 11:11:04 -08:00
Unknown W. Brackets
ae63628360
arm64jit: Statically allocate ra as well.
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This doesn't seem to have a significant impact on performance, but it
improves bloat by about 5%.
2017-12-30 11:11:03 -08:00
Unknown W. Brackets
89cbf36611
arm64jit: Free up W23 for static alloc.
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We shouldn't always reserve W23 for this uncommon case.
2017-12-30 07:51:27 -08:00
Unknown W. Brackets
e7ac672522
arm64jit: Cleanup method names, temp discard.
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This way MapDirtyIn won't accidentally discard temps.
2017-12-30 07:51:27 -08:00
Unknown W. Brackets
0fc8274ec4
arm64jit: Enable safe memory for lwl/lwr.
2017-12-29 17:30:18 -08:00
Unknown W. Brackets
c00044c5d8
arm64jit: Avoid arithmetic movs.
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ORR is the preferred encoding and may be faster on some chips.
2017-12-29 17:30:18 -08:00
Unknown W. Brackets
98ed6fab3f
arm64jit: Fix spilling for more than one temp reg.
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Otherwise we hang trying to spill the same reg over and over.
2017-12-29 17:30:17 -08:00
Unknown W. Brackets
ee236743f0
arm64jit: Use TBZ/TBNZ for vfpu branch as well.
2017-12-29 17:30:16 -08:00
Unknown W. Brackets
3b4917a308
arm64jit: Use TBZ/TBNZ for fp branches.
2017-12-29 17:30:15 -08:00
Unknown W. Brackets
c71285c970
arm64jit: Use CBZ/CBNZ for zero compare branches.
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These are pretty common, so it reduces bloat decently. Seems about the
same speed, though.
2017-12-29 17:30:15 -08:00