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1859 commits 16 branches 0 tags 17 MiB
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205 commits

Author SHA1 Message Date
Dillon Beliveau
83b77683ce Reset RSP PC to 0 when resetting 2021-11-06 10:22:41 -07:00
simuuz
baaee9ecc6 starting work on GUI 2021-10-06 21:04:23 +02:00
Dillon Beliveau
dda7fac8ec VI fixes 2021-06-06 12:59:59 -04:00
Dillon Beliveau
61f2e8bb69 mprotect rsp codecache properly on windows 2021-05-31 10:02:44 -04:00
Dillon Beliveau
f468607ed0 Merge branch 'master' into rsp-jit-wip 2021-05-30 11:57:07 -04:00
Dillon Beliveau
5490c6e059 Detect game's FPS 2021-05-29 21:46:47 -04:00
Dillon Beliveau
9e5d5e0968 WIP RSP JIT 2021-05-29 15:38:19 -04:00
Dillon Beliveau
22a55b57cc interrupt metrics, better plot axis scaling 2021-05-15 17:48:28 -04:00
Dillon Beliveau
5c57279fc0 fix tests 2021-05-15 15:48:45 -04:00
Dillon Beliveau
0ea8cf06aa PI interrupts on scheduler 2021-05-15 14:01:09 -04:00
Dillon Beliveau
84991cfbe4 audio tweaks 2021-05-15 13:12:38 -04:00
Dillon Beliveau
fb902eae87 also check scheduler in interpreter 2021-05-15 12:31:47 -04:00
Dillon Beliveau
7234273fb7 perform SI DMA at end of delay 2021-05-15 12:04:24 -04:00
Dillon Beliveau
d55dcde60c split SI code into own module, implement a scheduler and put SI DMA complete events on it 2021-05-15 11:38:50 -04:00
Dillon Beliveau
5930246cde VirtualProtect to make codecache executable on Windows 2021-05-08 14:27:43 -04:00
Dillon Beliveau
d8c940f031 Another set of Windows fixes 2021-05-08 12:35:13 -04:00
Dillon Beliveau
cff8355f49 Merge branch 'master' into windows-port-take-2 2021-05-08 11:34:49 -04:00
Dillon Beliveau
79d08af60a typo 2021-04-28 13:32:58 -04:00
Dillon Beliveau
0352f0142e calculate framebuffer height with vi_vstart instead of vi_yscale 2021-04-28 13:21:11 -04:00
Dillon Beliveau
a5f30c68c6 handle interlaced video correctly 2021-04-25 17:19:57 -04:00
Dillon Beliveau
b282d1fa1c interpreter matches jit timing (supports pal, etc) 2021-04-04 07:27:02 -04:00
Dillon Beliveau
09bb5b3cd4 Building on windows and working with software RDP only 2021-03-14 19:19:44 -04:00
Dillon Beliveau
3fc7c00d29 changes to support PAL for JIT 2021-03-13 17:20:40 -05:00
Dillon Beliveau
72d4a69031 more generic joybus device model 2021-03-06 16:06:41 -05:00
Dillon Beliveau
701e0594c8 should only need a 32MiB code cache 2021-03-06 10:17:12 -05:00
Dillon Beliveau
f34470dccd controller typedef in a better spot 2021-03-05 23:13:45 -05:00
Dillon Beliveau
2dbcbfd850 start working towards better device abstraction 2021-03-05 23:09:26 -05:00
Dillon Beliveau
f194aab940 zero out cpu and rsp 2021-02-27 11:20:28 -05:00
Dillon Beliveau
cae4529fe3 remove unneeded dereferences 2021-02-25 21:36:37 -05:00
Dillon Beliveau
a9070451d6 don't use function pointers for bus access anymore 2021-02-25 21:09:25 -05:00
Dillon Beliveau
12516c6d3f remove indirection around RSP 2021-02-25 20:32:13 -05:00
Dillon Beliveau
97f188846c remove more indirection in cpu interpreter 2021-02-23 20:20:02 -05:00
Dillon Beliveau
b607a4f6ee Use macros in more places 2021-02-23 17:23:29 -05:00
Dillon Beliveau
0a80874be5 Remove indirection 2021-02-23 17:22:32 -05:00
Dillon Beliveau
c95e1573b7 more rdp frameworking 2021-02-20 20:12:36 -05:00
Dillon Beliveau
34412336c9 rename video type enum elements, add software video mode 2021-02-20 16:57:16 -05:00
Dillon Beliveau
5ccee24981 move stuff around, RSP bus doesn't need whole system 2021-02-06 21:32:47 -05:00
Dillon Beliveau
a8db71cb1a delete some unused code 2021-02-06 21:32:47 -05:00
Dillon Beliveau
7a87019d46 take RSP as argument here 2021-02-06 21:32:47 -05:00
Dillon Beliveau
92bc5b6be4 per instruction, not per cycle 2021-02-06 14:47:31 -05:00
Dillon Beliveau
395c842c58 swapping between roms deals with different backup files correctly 2021-01-19 22:12:08 -05:00
Dillon Beliveau
f687ac01b6 file browser, and allow swapping out ROM 2021-01-19 21:53:45 -05:00
Dillon Beliveau
58cb143f83 Display UI on a blank screen when no ROM loaded 2021-01-19 21:09:22 -05:00
Dillon Beliveau
6c51fca0b4 imgui metrics with ImPlot 2021-01-19 00:06:31 -05:00
Dillon Beliveau
78077e7e55 exception updates & implement TRAP exception 2021-01-17 15:35:35 -05:00
Dillon Beliveau
e2b7a434ae begin separating emitter from main dynarec logic 2021-01-11 21:21:05 -05:00
Dillon Beliveau
c69bba3438 mempack handled separately from other save types 2021-01-07 18:56:37 -05:00
Dillon Beliveau
f028e49e9c controller mempak working 2021-01-05 00:32:54 -05:00
Dillon Beliveau
902649609d simple game DB 2021-01-04 21:49:35 -05:00
Dillon Beliveau
8dc4978364 create empty files for save data 2021-01-04 00:29:43 -05:00