commented-out code from stage0_i586.S. I am leaving the warnings about
gnu bintools in stage0_i586.S, just to make sure everyone knows why
some of the code is written the way it is, and nobody makes a mistake
in two years ...
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@244 f3766cd6-281f-0410-b1cd-43a5c92072e9
are used to from the Linux kernel.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@243 f3766cd6-281f-0410-b1cd-43a5c92072e9
further. It is only tested with my Kconfig build dir fixes applied.
Not sure how pretty this is. All the mkdirs increase build time by 0.2s,
so it looks a lot more nasty than it actually is. If wishes, we can create the
whole directory structure below build in the "prepare" target. It's not faster,
but more limited to one place.
The next step could be to spread out *_LIB_OBJ to lib/Makefile. in which case
it is nice that you can just write object.o instead of $(obj)/object.o or
$(obj)/lib/object.o ...
The top level modules (initram, stage0, stage2, ..) are still in $(obj).
So are the northbridge and southbridge object files - These require some more
cleanup anyways, as they're defined in the mainboard Makefile.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@242 f3766cd6-281f-0410-b1cd-43a5c92072e9
according subdirectories in $(obj)/util/kconfig[/lxdialog]
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@241 f3766cd6-281f-0410-b1cd-43a5c92072e9
built.
Instead of having a bootblock and a lar archive, the bootblock is now
part of the archive:
$ lar -l build/linuxbios.rom
normal/initram (93 bytes @0x24)
normal/payload (32768 bytes @0xb4)
normal/stage2 (32028 bytes @0x80e4)
linuxbios.bootblock (16384 bytes @0x3c000)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@240 f3766cd6-281f-0410-b1cd-43a5c92072e9
is a base change to make the whole linuxbios.rom a lar file.
* fix a whole lot of lar bugs (that never showed up in production yet)
* add proper option parsing to lar
* add verbose option
* add option to automatically pad lar archive to a certain size
* add proper file handling (specifying a directory will now pack all files
in that directory into the lar, instead of a 4k dummy file)
* catch lots of user errors, less implicit assumptions
* merge all header files into lib.h (except lar.h which is needed by other
programs using the lar format). lib.h is still very small.
* print errors to stderr
* (slipped in) copy linuxbios.rom to bios.bin for qemu ;-)
* adapt arch/x86/Makefile to use the new features.
* set version to 0.9
* lots of security bugs fixed (thanks to Uwe!)
* catch low memory conditions in strdup
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@234 f3766cd6-281f-0410-b1cd-43a5c92072e9
This tree shows the new model. It demonstrates the constructor array
in use, for devices that are and are not specified in the dts. It
introduces a new generic structure, device_id, analogous to
device_path, which can describe all the types of device IDs we have.
It shows a way to set up arrays of structs, in the dts, for the
constructors, so we avoid ldscript hacks.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@233 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@202 f3766cd6-281f-0410-b1cd-43a5c92072e9
everything in util/ has its own subdirectory (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@199 f3766cd6-281f-0410-b1cd-43a5c92072e9
code (This goes hand in hand, as some parts of serial were hardcoded
to one architecture until now)
* include/uart8250.h: add TTYSx defines that are used in
multiple places. formerly part of arch/x86/serial.c.
Drop init_uart8250 (unused)
* lib/uart8250.c: drop arch/x86/config.h usage
Drop init_uart8250 (unused)
* arch/powerpc/Kconfig, arch/x86/Kconfig: add CONFIG_ARCH to
contain the directory name under LinuxBIOSv3/arch/
* arch/x86/console.c: drop some dead code. Drop hardcoded config.h values.
use generic uart8250.h header
* arch/x86/cachemain.c: Drop hardcoded config.h values. Still use hardcoded
ROM size for now. (To be changed later)
* arch/x86/config.h: dropped, no longer needed
* arch/x86/serial.c: factor out generically used defines to uart8250.h
* Makefile: use mainboard architecture instead of target architecture to choose
include path.
Read .xcompile if available (configure replacement).
Create build.h with compile time and version.
* util/xcompile/xcompile: new file. Search for supported cross compilers
linkers, assemblers (and potentially supported compiler flags etc)
This is a very slick configure replacement.
* util/dtc/Makefile: fix Makefile for cross compilation
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@190 f3766cd6-281f-0410-b1cd-43a5c92072e9
log level names now, which is a bit more intuitive than a single digit.
Add a "Console support" option which globally enables or disables
support for (any) debug console. This might prove useful when you want
to silence the boot process and/or make your image smaller.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@182 f3766cd6-281f-0410-b1cd-43a5c92072e9
Remove Changelog section from README; not needed as we have svn logs.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@178 f3766cd6-281f-0410-b1cd-43a5c92072e9
revised BSD license (without advertising clause).
Add the BSD license text to the files, in addition to the GPL header.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@176 f3766cd6-281f-0410-b1cd-43a5c92072e9
add debug printks.
make dtc put 'root' as the first_node, instead of making the last node
be the first node .... much happier in linuxbios.
sprintf is broken ... dammit. I hope someone will fix it. I've got about
another week of full-time I can spend on this and then I go back to part
time. So I'm going to need some help soon.
other fixups, and also, make the dts conform to the needs of the device
tree. So we have a domain0 and a device (0,0) that is the north.
Mostly things are working, but we're STILL not getting any memory in the
LB tables from the north. The device tree is a bitch.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@175 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@172 f3766cd6-281f-0410-b1cd-43a5c92072e9
The output is in HTML format and will be stored in the doxygen/html
directory. You can enable more output formats (latex, RTF, ...)
in the config file, util/Doxyfile.LinuxBIOS.
The current config options seem pretty reasonable to me, but we can
adapt them further to our needs, if required.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@171 f3766cd6-281f-0410-b1cd-43a5c92072e9
generated with 'doxygen -g' and needs to be adapted for LinuxBIOS. A patch
which does just that will follow...
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@169 f3766cd6-281f-0410-b1cd-43a5c92072e9
Phase 1: done
Phase 2: early setup ...
Phase 2: done
Phase 3: Enumerating buses...
qemu-x86 enable_dev done
dev_phase3_scan: scanning Root Device
scan_static_bus for root(Root Device)
cpus: Unknown device path type: 0
cpus() enabled
i440bxemulation_enable_dev:
i440bxemulation_enable_dev: DONE
northbridge_intel_i440bxemulation() enabled
northbridge_intel_i440bxemulation() scanning...
dev_phase3_scan: scanning
pci_scan_bus start
PCI: pci_scan_bus for bus 00
PCI: scan devfn 0x0 to 0xff
PCI: devfn 0x0
PCI: pci_scan_bus pci_scan_get_dev returns dev <NULL>
Change dts compiler to emit a new struct member, dtsname, for devices,
so we can get actual useful names for things.
Several mods and printks added.
printk(BIOS_SPEW
gives no output for reasons I don't understand.
Next in line is bringing back v2 support for pci, but not doing it the
way v2 does it.
note the cpus() printk above. cpus don't have a valid path yet.
We still need to work out the dts syntax for systems with multiple links
(opteron)
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@163 f3766cd6-281f-0410-b1cd-43a5c92072e9
If this is a hard OFW limitation, let's fix OFW.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@161 f3766cd6-281f-0410-b1cd-43a5c92072e9
Also added comments.
A big change is in the dts. In OFW trees, the hierarchy seems to be:
/root/cpu/northbridge
south
other pci
note that the north is in the hierarchy under the south. This hierarchy
makes no sense on systems with a shared frontside bus, or at least I
don't see how it can. In those systems, it's easier to think about
the CPUs AND northbridges as children of the front side bus.
in LinuxBIOS, it has always been this:
/root/cpu/whatever
/root/northbridge/
south
other pci
There have been many discussions over how it ought to be, for 8 years
now, and we've always come back to how LB does it. So I have changed the
dts for qemu for now to match LB's way of doing things. Note that the
new system is flexible enough that, on K8, we CAN do things as above:
/cpu@0/amd8knorthbridge/etc.
/cpu@1/amd8knorthbridge/etc.
But on qemu, for now, the root is the mainboard, and the CPU and
northbridge are siblings.
I've added some informational printks, cleaned up pci_ops, and done
other things so that it builds and all seems to work -- until it hangs
hard in enumeration in i440bx ...
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@160 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@157 f3766cd6-281f-0410-b1cd-43a5c92072e9
I was meaning to check in more, but I lost 4h of work due to some ext3
problem. Bummer I believed those saying its more stable than reiserfs.
Signed-off-by: Stefan Reinauer <stepan@openbios.org>
Acked-by: Stefan Reinauer <stepan@openbios.org>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@134 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@120 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@119 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@107 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@99 f3766cd6-281f-0410-b1cd-43a5c92072e9
* remove some warnings
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@95 f3766cd6-281f-0410-b1cd-43a5c92072e9
Fix up dts to set up ops struct member. Fix dts for qemu mainboard.
We are getting past stage2 now, it is time for elfboot.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@88 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@87 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@86 f3766cd6-281f-0410-b1cd-43a5c92072e9
* seperate vsprintf to a seperate file as it was in v2.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@83 f3766cd6-281f-0410-b1cd-43a5c92072e9
* fix make config
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@73 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@71 f3766cd6-281f-0410-b1cd-43a5c92072e9
accordance to the newboot document:
* reset vector (16 bytes)
* vpd (240bytes)
* boot block (8k - 256b)
* lar archive (256-8 k)
The boot block is kind of simple, still. It enables pmode, car, and
starts looking for an initram module in the lar archive.
Note: This doesnt do much at the moment,
as gas seems to produce buggy code in init.S.
Take this as a suggestion of how it might work and please provide
patches fixing it and bringing it into shape.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@62 f3766cd6-281f-0410-b1cd-43a5c92072e9
expect to hear about this change. Note that Stefan and I have discussed
this change and feel it is at least worth trying.
Also, please be aware that this change is backed by a
lot of experience with LinuxBIOS users and usage of the last 7 years.
First I detail changes, then I detail why.
Major changes for the new config system.
Selection of object files, and variable setting, is now controlled by
Kconfig.
There is only one dts now. It is in the mainboard file. It may later
move to the target file -- we will see.
The dts is in two parts, seperated by %%. The first part is a
fairly standard dts, and the dtc will automatically generate a device
tree from it. The device tree is composed of generic structures. These
structures are identical to those of the old V2 device tree. All the
hierarchy and parent/child/sibling relationships appear to be correctly
generated. This means that all the v2 code will work without change.
For each node in the tree, if the node has a property named 'config',
then the dtc will generate a reference to a structure and an include
directive for a path -- much as in the old Config tool.
Example: here is a fragment of a dts
==========
north {
config = "northbridge,intel,i440bx";
};
%%
struct northbridge_intel_i440bx_config north = {
.whatever = 1;
};
===========
The dtc will create:
#include <northbridge/intel/i440gx/config.h>
struct northbridge_intel_i440bx_config north = {
.whatever = 1;
};
struct device dev_north {
.chip_ops = &northbridge_intel_i440bx_ops;
.chip_info = &north;
.
.
.
};
So the programmer specifies the tree structure in dts form, indicates
which devices have a config entry, and sets up the C code for the
config. I have worked with this and am finding it very easy to use. I
think this is the way to go. Plus, we are getting rid of most of the
include hell of the old Config system.
Note that the config node is OPTTONAL! If you do not set it then no
structure usage/include will occur.
WHY?
Here is my setup for v3. I think this is good. I like it and am
finding it easy to work with.
Basically, the old config system combined makefile generation, tree
generation, and chip struct initialization in one file -- config.lb.
What we need are four things:
1. selection of .c files to build the bios with
2. the device tree -- this is built with generic structures defined in
include/device/device.h
3. The per-chip structures, usually defined in, e.g.,
northbridge/intel/i440bx/chip.h
4. setting of variables such as baud rate, etc.
Again, this was all done in Config.lb, spread all over the place, like this:
config chip.h
object superio.o
This was hard for people. So we moved the makefile stuff out into the
Kconfig system. This change eliminates (1) and (4) above.
OK, what's left? Well, with our plans from last October, we had device
object model tree stuff, AND still had chip struct initialization in
one file. (2) and (3) above. This is tough, because I was fighting the
mapping of DTS stuff to the C code. It was getting just as ugly as the
old Config.lb. I have been struggling with this for months and it just
wasn't going anywhere.
But it's way too hard to set up the device tree by hand -- I've tried
it. OTOH, it's really easy to set up the per-chip stuff by hand --
I've tried that too. I did a search via:
find ~/src/LinuxBIOSv2/src/ -name chip.h -print
and looked at them all. These files are really simple. There's no
reason to get too tricky, as there is nothing worth getting tricky
about. The problem is the device tree, not these simple chip info
structs.
So, here's the solution.
The ONLY dts is in the mainboard directory. There is no equivalent of
Config.lb in the south, north, cpu, all that stuff any more. The
Kconfig and Makefile in those directories replaced the build-related
functions of Config.lb.-- (1) and (4) above. The only thing left was
chip.h anyway (3) above.
But how can we express the settings in chip.h via the DTS? IT's been
very hard to get this going.
So, here is the trick. The dts in the mainboard directory divides into
two parts. The first part is the standard dts. The second part is the
C code. They are seperated, as in lex and yacc, with a %%.
Here is the dts for qemu (note that the cpus keyword is still not
right, and maybe this structure needs to change; i'm not that worried
about that too much, just the big picture I'm discussing here). Also,
note I'm working with some new properties, e.g. pcipath and pcidomain
-- if these properties exist ina node, then I create initialized
structure members for them. Also see enabled and on_mainboard --
properties, but I catch them and use them.
/{
cpus {
config="mainboard,emulation,qemu-i386";
emulation,qemu-i386@0{
enabled;
on_mainboard;
device_type = "cpu";
name = "emulation,qemu-i386";
pcidomain = "0";
/* the I/O stuff */
northbridge,intel,440bx{
pcipath = "0,0";
southbridge,intel,piix4{
};
};
};
};
};
%%
/* the user sets up these structs */
struct mainboard_emulation_qemu_i386_config cpus = {
.nothing = 1,
};
You can see the device tree stuff at top. If a given node has a
property named 'config', then that means what the old 'chip' thing
meant in Config.lb. The dtc will generate an #include to pull in a
file with the path name specified in the config property. The dtc will
not set up the per-chip struct, but it will set up a pointer to a
struct when it sets up the device tree. Note that at bottom, it's up
to you to set up the initialized struct. But this was always the easy
part anyway. Instead of wacky pseudo-C like we had in config.lb, we
just do real C. It's easy. Here is what the dtc generates.
#include <device/device.h>
#include <device/pci.h>
#include <mainboard/emulation/qemu-i386/config.h>
struct device dev_southbridge_intel_piix4;
struct device dev_northbridge_intel_440bx;
struct device dev_emulation_qemu_i386_0;
struct device dev_cpus;
struct device dev_root;
extern struct chip_operations mainboard_emulation_qemu_i386_ops;
struct mainboard_emulation_qemu_i386_config cpus = {
.nothing = 1,
};
struct device dev_root = {
.path = { .type = DEVICE_PATH_ROOT },
.links = 1,
.link = {
[0] = {
.dev = &dev_root,
.link = 0,
.children = &dev_cpus
},
},
.bus = &dev_root.link[0],
};
struct device dev_cpus = {
.chip_ops = &mainboard_emulation_qemu_i386_ops,
.chip_info = &cpus,
.links = 1,
.link = {
[0] = {
.dev = &dev_cpus,
.link = 0,
.children = &dev_emulation_qemu_i386_0
},
},
.bus = &dev_root.link[0],
.next = &dev_root,
};
struct device dev_emulation_qemu_i386_0 = {
.enabled = 1,
.on_mainboard = 1,
.path = {.type=DEVICE_PATH_PCI_DOMAIN,.u={.pci_domain={ .domain = 0 }}}
,
.links = 1,
.link = {
[0] = {
.dev = &dev_emulation_qemu_i386_0,
.link = 0,
.children = &dev_northbridge_intel_440bx
},
},
.bus = &dev_cpus.link[0],
.next = &dev_cpus,
};
struct device dev_northbridge_intel_440bx = {
.path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0,0)}}},
.links = 1,
.link = {
[0] = {
.dev = &dev_northbridge_intel_440bx,
.link = 0,
.children = &dev_southbridge_intel_piix4
},
},
.bus = &dev_emulation_qemu_i386_0.link[0],
.next = &dev_emulation_qemu_i386_0,
};
struct device dev_southbridge_intel_piix4 = {
.bus = &dev_northbridge_intel_440bx.link[0],
.next = &dev_northbridge_intel_440bx,
};
This compiles just fine.
I think this is the right way to go, comments to me.
But, note, IT COMPILES. And it's simple. And, it will work with our
current device tree code!
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@59 f3766cd6-281f-0410-b1cd-43a5c92072e9
* fix arch/io.h to use consistent types
* add compression code and start integration into Kconfig
* update to newer version of Kconfig, and rename some occurences
of "Linux" to "LinuxBIOS"
* set up Make framework to create linuxbios.rom
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G Minnich <rminnich@lanl.gov>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@55 f3766cd6-281f-0410-b1cd-43a5c92072e9
