Emulation/ppsspp
1
0
Fork 0
mirror of https://github.com/hrydgard/ppsspp.git synced 2025-04-02 11:01:50 -04:00
Code Issues Projects Releases Packages Wiki Activity
10140 commits 81 branches 122 tags 700 MiB
Commit graph

50 commits

Author SHA1 Message Date
Unknown W. Brackets
c63560c0dd armjit: Try to find imms to optimize a reg load. 
This way we skip the MOVW/MOVT and go for one op only.
 2013-11-10 16:20:34 -08:00
Unknown W. Brackets
7e46ee0b0f armjit: Replace MOVI2R with using the regcache. 
So that it can optimize the value with existing imms.

Not actually optimizing yet.
 2013-11-10 15:50:45 -08:00
Unknown W. Brackets
d092f7dd2d armjit: Remember reg imm values even after flush. 
This way, we can base other imm values off them, or even do imm math using
them.  We can also avoid re-flushing an imm.
 2013-11-10 15:50:14 -08:00
Unknown W. Brackets
7f9cbc0f10 armjit: Minor cleanup and logging tweaks. 2013-11-10 15:12:40 -08:00
Unknown W. Brackets
a3a061a69f armjit: Optimize a division by a power of two. 
These really happen.
 2013-11-09 08:43:53 -08:00
Unknown W. Brackets
54168b173e armjit: Clean up some magic numbers. 2013-11-09 08:25:08 -08:00
Unknown W. Brackets
6038d96b46 armjit: Flush regs using STMIA where possible. 2013-11-09 08:25:07 -08:00
Unknown W. Brackets
e686ff59bf armjit: Allocate regs in preferred slots. 
This may allow better flushing.  Not sure if these are the best regs,
but if they aren't it shouldn't really hurt.
 2013-11-09 08:25:07 -08:00
Unknown W. Brackets
cb3bb73148 armjit: Improve GPR typesafety. 2013-11-09 08:24:15 -08:00
Henrik Rydgard
58c39a38ee ARM regcache: Add mechanism to keep registers converted to pointers around 2013-11-09 16:57:29 +01:00
Henrik Rydgard
5a95e267fb Add an optimization to discard registers at the end of functions when possible. 
Works in some games but crashes many so hiding it for now. Do not add UI.
 2013-11-08 12:43:48 +01:00
Henrik Rydgard
32c95af820 ARM: Some zero-register fixes 2013-11-07 15:29:13 +01:00
Henrik Rydgard
8c88dff5a4 More log categories, use them (and existing ones). Improve log config. 2013-09-07 22:02:55 +02:00
Henrik Rydgard
3b9e6243eb Only flush the required registers on function calls (only implemented for real on ARM) 2013-07-28 22:21:43 +02:00
Sacha
056ae5db44 Buildfix for Qt. 2013-07-29 00:26:36 +10:00
Henrik Rydgard
59644ad59b Jit: Implement VMMUL for ARM, optimize the x86 implementation. Also add VCST. 2013-07-28 12:14:35 +02:00
Henrik Rydgard
76a937f489 ARMJIT Experiment: Keep downcount in a register. Needs benchmarking. 2013-07-27 17:27:26 +02:00
Unknown W. Brackets
e355518549 Fix a bad enum compare. 2013-07-26 22:30:05 -07:00
Aapo Rantalainen
2b965a6f03 Maemo5 support 2013-03-22 09:15:00 +02:00
Unknown W. Brackets
cea396e901 armjit: Don't use R1 in the regcache. 
This way it can be used in swl/swr/ins as a temp reg.
Note: those instructions are currently DISABLEd, though.
 2013-03-07 02:09:13 -08:00
Sacha
268d16bd24 Use correct args for STR(..) throughout armjit. 2013-03-07 00:59:07 +10:00
Henrik Rydgard
516ca8a0c4 Merge branch 'master' into armjit-fpu 
Conflicts:
	Core/MIPS/ARM/ArmJit.h
	Core/MIPS/x86/CompVFPU.cpp
	GPU/GLES/Framebuffer.cpp
 2013-02-28 23:56:28 +01:00
Henrik Rydgard
28575d4672 Fix the avoidLoad flag in the arm regalloc 2013-02-28 23:45:47 +01:00
Henrik Rydgard
b8abb77eee More armjit-fpu work - dot product working for example. Add some non working DISABLEd stuff too. 2013-02-16 09:27:48 +01:00
Henrik Rydgard
048cf35922 More ARMJit FPU work - some instructions and optimizations. 2013-02-14 00:02:09 +01:00
Henrik Rydgard
4bdb2045a7 Armjit-FPU: Fix lots of bugs, impl some stuff. Still nothing working. 2013-02-11 23:10:11 +01:00
Henrik Rydgard
f75d14d3b5 ARM FPU jit work 2013-02-10 15:53:56 +01:00
Henrik Rydgard
021736c533 Initial FPU regcache 2013-02-09 18:18:32 +01:00
Henrik Rydgard
d8f4e27926 Rename ARMABI_MOVI2R to MOVI2R 2013-01-31 23:41:05 +01:00
Henrik Rydgard
c97f63a9d9 Minor armjit opt 2013-01-30 20:01:42 +01:00
Henrik Rydgard
1b4394ac5e ARM jit: jit integer multiplies. ARM is so nice, very clean. 2013-01-30 01:06:14 +01:00
Henrik Rydgard
68991511ee Split out the FPU reg cache into its own file too. 2013-01-26 01:34:19 +01:00
Henrik Rydgard
66ee2e2933 Remove ArmABI.cpp/h, didn't need that stuff. 2013-01-14 22:19:18 +01:00
Henrik Rydgard
bc9c3db303 Armjit: Add option for fastmem. Small optimization. 2013-01-11 17:25:54 +01:00
Henrik Rydgard
9b791b9953 More ARMJIT optimization 2013-01-11 15:22:31 +01:00
Henrik Rydgard
8cd5ae933f sw/lw 2013-01-10 12:14:23 +01:00
Henrik Rydgard
9dcdb6df90 Jit work! Shifts, 3-operand ops, turn O2 back on... 2013-01-10 01:20:25 +01:00
Henrik Rydgard
71652874c2 Fix jit bugs related to the dirty flag, and more: 
* Tweak block logging
* Faster calls-to-interpreter.
 2013-01-10 00:03:51 +01:00
Henrik Rydgard
209f1d79a9 SpillLock is now per MIPS register instead of per ARM register. Fix array size. 2013-01-09 23:14:21 +01:00
Henrik Rydgard
fb7116ccd5 Add more checks. 2013-01-09 22:55:58 +01:00
Henrik Rydgard
2f4e6eaf01 Remove allocLock until we need it 2013-01-09 22:46:27 +01:00
Henrik Rydgard
dafe2c389c More regalloc fixing and tweaks. Still not working the way I want it. 2013-01-09 13:38:44 +01:00
Henrik Rydgard
dafc9f62df Regcache fixes, etc. thing still don't work when I turn on addiu :( 2013-01-09 11:20:48 +01:00
Henrik Rydgard
81c6c4805d Small dispatcher optimizations, cleanup. Still no cube. 2013-01-09 00:42:03 +01:00
Henrik Rydgard
76481a300c Icache must be invalidated. Jit now starts to run, but there's no cube in cube.elf! 2013-01-08 23:52:11 +01:00
Henrik Rydgard
8c06edc47b It's getting close to the first totally unoptimized jit run. 2013-01-08 17:03:17 +01:00
Henrik Rydgard
b78ad83f00 R10, not R9, points to the mips state... 2013-01-08 14:29:03 +01:00
Henrik Rydgard
b3fd1ff34c Lots of various work on the ARM jit. It executes a couple of blocks now. 2013-01-08 13:49:52 +01:00
Henrik Rydgard
5a7f4acc06 More armjit work 2013-01-08 00:26:42 +01:00
Henrik Rydgard
a2ff416534 Rename files. Rewrite ArmRegCache from scratch. 2013-01-07 22:33:09 +01:00