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armjit: Minor cleanup and logging tweaks.
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455a7e090d
commit
7f9cbc0f10
1 changed files with 5 additions and 5 deletions
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@ -103,7 +103,7 @@ bool ArmRegCache::IsMappedAsPointer(MIPSGPReg mipsReg) {
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void ArmRegCache::MapRegTo(ARMReg reg, MIPSGPReg mipsReg, int mapFlags) {
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ar[reg].isDirty = (mapFlags & MAP_DIRTY) ? true : false;
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if (!(mapFlags & MAP_NOINIT)) {
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if (mipsReg == 0) {
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if (mipsReg == MIPS_REG_ZERO) {
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// If we get a request to load the zero register, at least we won't spend
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// time on a memory access...
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// TODO: EOR?
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@ -290,7 +290,7 @@ void ArmRegCache::FlushR(MIPSGPReg r) {
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case ML_ARMREG:
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if (mr[r].reg == INVALID_REG) {
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ERROR_LOG(JIT, "FlushMipsReg: MipsReg had bad ArmReg");
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ERROR_LOG(JIT, "FlushR: MipsReg %d had bad ArmReg", r);
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}
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if (ar[mr[r].reg].isDirty) {
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if (r != MIPS_REG_ZERO) {
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@ -314,7 +314,7 @@ void ArmRegCache::FlushR(MIPSGPReg r) {
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break;
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default:
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//BAD
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ERROR_LOG(JIT, "FlushR: MipsReg %d with invalid location %d", r, mr[r].loc);
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break;
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}
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mr[r].loc = ML_MEM;
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@ -425,11 +425,11 @@ void ArmRegCache::FlushAll() {
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}
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void ArmRegCache::SetImm(MIPSGPReg r, u32 immVal) {
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if (r == MIPS_REG_ZERO)
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if (r == MIPS_REG_ZERO && immVal != 0)
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ERROR_LOG(JIT, "Trying to set immediate %08x to r0", immVal);
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// Zap existing value if cached in a reg
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if (mr[r].loc == ML_ARMREG || mr[r].loc == ML_ARMREG_AS_PTR) {
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if (mr[r].reg != INVALID_REG) {
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ar[mr[r].reg].mipsReg = MIPS_REG_INVALID;
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ar[mr[r].reg].isDirty = false;
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}
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