Commit graph

723 commits

Author SHA1 Message Date
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a5214d0b1a Jit: Ignore high bit in vmfvc/vmtvc. 2019-03-31 17:09:55 -07:00
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5749ae09d0 interp: Correct vmfvc register behavior.
The target and source registers were completely wrong.
2019-03-31 13:41:48 -07:00
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d5273f589a interp: Mask value in vpfxd.
The actual register ends up with only the lower 12 bits, which makes sense
since those are the only ones that do anything.
2019-03-31 08:23:36 -07:00
Unknown W. Brackets
6178a1fb33 Jit: Correct vocp prefix handling.
See #5549.  Matches tests for various prefix settings.
2019-02-23 09:15:26 -08:00
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419c1fbd73 Jit: Respect flags for jit types and features.
Left some free space for more.
2019-02-03 14:57:08 -08:00
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b2cc4a0965 Debugger: Add memory breakpoint management. 2018-06-08 06:59:18 -07:00
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4c3fe47372 jit: Remove unused breakpoint code. 2018-06-06 17:31:56 -07:00
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eb4b59b530 arm64jit: Enable breakpoints.
Memory breakpoints not yet really tested.
2018-06-06 17:31:56 -07:00
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ab809bd19e jit: Apply hasSetRounding at compile time.
Otherwise, the block will be executed with the wrong rounding mode the
first time rounding is set.  This could be important if it was set for a
single operation.

This is only a problem the first time it's set.
2018-04-01 10:36:16 -07:00
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09e307b097 arm64jit: Update rounding mode on thread switch.
Since fcr31 is per-thread, we must update jit state when it changes.
This also fixes the rounding mode on load state and jit/interp switch.
2018-04-01 10:12:32 -07:00
Henrik Rydgård
468b830bec Show IR disassembly in JIT Compare screen 2018-01-04 12:23:23 +01:00
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8ffb0101fe jit: Report blocks with uneaten VFPU prefixes.
There may be options to avoid, like continuing these blocks, especially if
they're likely or something.
2018-01-01 08:38:10 -08:00
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48fe0168f1 x86jit: Fix safemem on WX exclusive. 2017-12-28 11:21:45 -08:00
Henrik Rydgård
c55847a79e Fix typo causing #10408 2017-12-14 00:23:07 +01:00
Henrik Rydgård
0207739d76 Can't call functions through known-nil pointers, even if they don't touch local data - LLVM's optimizer might have done something stupid. 2017-11-30 01:07:03 +01:00
Henrik Rydgård
bd8067a631 Reduce a ERROR_LOG_REPORT to a warning (vfpu branches in delay slots) 2017-11-11 19:39:44 +01:00
Henrik Rydgård
22e65ba80d Get rid of ugly alignment macros and some other cruft, we now have alignas(16) from C++11 2017-08-31 01:14:51 +02:00
Henrik Rydgård
884aef6603 SafeMem: Remove the "far" optimization that saves 3 bytes sometimes but is really dangerous and not worth the complexity. 2017-08-30 09:58:30 +02:00
Henrik Rydgård
8d0498303a Fix a PIC compliance bug in the VFPU. Comment other cases properly (for easy searching). 2017-08-29 11:45:12 +02:00
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3dacd323c8 x64: Avoid clobbering jr dest in cases. 2017-07-08 16:40:06 -07:00
Unknown W. Brackets
79a6690a30 x64: Fix coreState rip checks. 2017-07-08 16:39:26 -07:00
Henrik Rydgård
8d86463b1a More RIP fixes 2017-07-07 15:46:14 +02:00
Henrik Rydgård
837118d230 More RIP elimination 2017-07-07 15:07:56 +02:00
Henrik Rydgård
86396ba39b Turning off the "close memory finder" lets us find more RIP addressing... 2017-07-07 15:07:53 +02:00
Henrik Rydgard
8872057a2d x86-64: Linux ABI fix 2017-07-07 14:22:35 +02:00
Henrik Rydgård
dad5ca45f2 Delete some unnecessary loads. These loads are done properly inside trigCallHelper. 2017-07-07 14:15:10 +02:00
Henrik Rydgård
d312086a61 32-bit fixes 2017-07-07 13:57:37 +02:00
Henrik Rydgård
e5a7d0df95 Buildfix for platforms with standards-compliant offsetof (no dynamic indexing allowed)k 2017-07-07 12:59:23 +02:00
Henrik Rydgård
ecbeee5225 RegCacheFPU 2017-07-07 11:33:07 +02:00
Henrik Rydgård
758cbd748e Replace vminmax_sreg with mips->temp 2017-07-07 11:33:07 +02:00
Henrik Rydgård
270001e651 vminmax_sreg only needs a single element 2017-07-07 11:33:07 +02:00
Henrik Rydgård
567937fa4d x64: Enable non-RIP addressing for FPU registers 2017-07-07 11:33:07 +02:00
Henrik Rydgård
077fafba64 Get rid of sincostemp global. Solution not tested on linux yet. 2017-07-07 11:33:06 +02:00
Henrik Rydgård
cfa7c61651 More RIP removal. Also add some comments to make it easy to just search for "M(&" to find remaining offenders. 2017-07-07 11:33:06 +02:00
Henrik Rydgård
0645677fea Access FPU temps through CTXREG 2017-07-07 11:33:06 +02:00
Henrik Rydgård
752254d404 Surprise! More. Making many commits for easier bisects. 2017-07-07 11:33:06 +02:00
Henrik Rydgård
0743334946 Guess what? More RIP elimination (but keep the fast path too) 2017-07-07 11:33:05 +02:00
Henrik Rydgård
7c3b37c561 More RIP elimination 2017-07-07 11:33:05 +02:00
Henrik Rydgård
7c1ae5b3e6 Move tempValues into MIPSState 2017-07-07 11:33:05 +02:00
Henrik Rydgård
f08c278fd5 Move another couple of temps into MIPSState 2017-07-07 11:33:05 +02:00
Henrik Rydgård
102be8654f Remove RIP access from some matrix ops, SafeMem 2017-07-07 11:33:05 +02:00
Henrik Rydgård
2e9a9f2d7c Move mscxr_temp to MIPSState 2017-07-07 11:33:05 +02:00
Henrik Rydgård
d82f90f1b2 More RIP removal 2017-07-07 11:33:05 +02:00
Henrik Rydgård
78538ff61e Some code cleanup. More work towards removing RIP addressing 2017-07-07 11:33:04 +02:00
Henrik Rydgård
f44f7472e5 Remove more RIP addressing 2017-07-05 13:27:38 +02:00
Henrik Rydgård
99d23fb021 X64/X86: Even more use of the context register 2017-07-05 13:21:35 +02:00
Henrik Rydgård
730e9ced6c X86/X64: We have the context register loaded, let's use it more. 2017-07-05 13:12:42 +02:00
Henrik Rydgård
c4db0a2311 x64: Use context register to access saved_flags 2017-07-05 12:45:56 +02:00
Unknown W. Brackets
33b073c545 Jit: Fix syscall outside delay slot.
Doesn't happen in real games, but useful in debug code.
2017-06-04 10:39:01 -07:00
Henrik Rydgård
0ec1e5e3b2 Don't erase and rewrite the dispatcher when the cache is cleared. Fixes #9708 2017-05-26 15:48:03 +02:00