Emulation/ppsspp
1
0
Fork 0
mirror of https://github.com/hrydgard/ppsspp.git synced 2025-04-02 11:01:50 -04:00
Code Issues Projects Releases Packages Wiki Activity
29877 commits 81 branches 122 tags 700 MiB
Commit graph

251 commits

Author SHA1 Message Date
Unknown W. Brackets
bc16a55028 jit: Count delay slot cycles separately. 
This makes it easier to count cycles per instruction, instead of ignoring
the delay slot's instruction for cycle count.
 2021-04-12 07:04:22 -07:00
Unknown W. Brackets
cae0815095 jit: Avoid using mips identifier directly. 
Apparently this gets defined on mips systems.
 2021-02-26 07:24:58 -08:00
Henrik Rydgård
6df37b86bc
Merge pull request #14076 from unknownbrackets/zhp-map 
GPU: Force texture invalidation for ZHP minimap
 2021-02-15 11:33:32 +01:00
Henrik Rydgård
6b4356a060 Handle exec addr errors better - don't let IgnoreBadMemoryAccesses skip dispatcher exceptions. 
It would then just fall through into the compiler and die.

Should remove one of the "mystery" crashes from #14082.
 2021-02-09 09:32:38 +01:00
Unknown W. Brackets
5d60fa0d0d Common: Maintain C++11 support in sign extend. 2021-01-31 08:44:02 -08:00
Unknown W. Brackets
1b00da2f3a Common: Sign extend w/func not chained casts. 
Should be clearer to read and easier to get right.
 2021-01-31 01:25:52 -08:00
Unknown W. Brackets
e99c69f19e jit: Be very clear on sign extension. 2021-01-30 11:41:30 -08:00
Unknown W. Brackets
c179cad5c2 jit: Make branch shift more obvious. 
And also not technically undefined behavior.
 2021-01-29 20:53:41 -08:00
Henrik Rydgård
1b596ef82b Fix/workaround ARM64 with the MASKED_PSP_MEMORY build flag. 2020-11-03 00:20:16 +01:00
Henrik Rydgård
4c034ce988 Make all the Comp_Cache implementations the same. 
We have the informative comments in the interpreter implementation
anyway.
 2020-10-16 09:13:41 +02:00
Henrik Rydgård
821817e6d4 Move the profiler to Common 2020-10-04 11:42:16 +02:00
Henrik Rydgård
9e41fafd0d Move math and some file and data conversion files out from native to Common. 
Buildfixing

Move some file util files

Buildfix

Move KeyMap.cpp/h to Core where they belong better.

libretro buildfix attempt

Move ini_file

More buildfixes
 2020-10-04 09:12:46 +02:00
Henrik Rydgård
4d3ec20082 ByteSwap.h results in a file name collision on some systems with byteswap.h. Fix this by merging it into BitSet.h. 2020-09-30 00:09:13 +02:00
Henrik Rydgård
d9edc68966 Remove unnecessary use of thread local storage 2020-09-29 15:51:51 +02:00
Unknown W. Brackets
6b8f7294b3 Global: Remove ARM64 define. 
Was barely used anymore, and some users are specifying it when it's not
the case, so better to detect consistently.
 2020-08-29 08:45:50 -07:00
Henrik Rydgård
c41f875df4 Remove base/logging.h in a whole lot more places. 2020-08-15 19:09:00 +02:00
Henrik Rydgård
6f1915110f Remove base/logging from UI and more 2020-08-15 19:08:54 +02:00
Henrik Rydgård
b43698a13d Remove most instances of base/logging.h from Common, Core, GPU, more 2020-08-15 19:08:44 +02:00
Unknown W. Brackets
4b4e3432cd SaveState: Split Do() into a separate header. 2020-08-10 08:03:41 +00:00
Henrik Rydgård
c5e0b799d9 Remove category from _assert_msg_ functions. We don't filter these by category anyway. 
Fixes the inconsistency where we _assert_ didn't take a category but
_assert_msg_ did.
 2020-07-19 20:33:25 +02:00
Henrik Rydgård
6f97c3d422 Various platform buildfixes 2020-07-14 09:25:59 +02:00
Henrik Rydgard
c988d42b04 ARM/ARM64 instruction analysis, hook up to handler 2020-07-14 09:25:45 +02:00
Unknown W. Brackets
ae224b3893 jit: Add some basic checks in armjit/arm64jit. 
Just the simple (and unlikely) case so far...
 2020-07-13 01:49:19 -07:00
Unknown W. Brackets
7910b4029a arm64jit: Track writable and non-writable pointers. 
Switch uses different memory regions.  We can handle this, might as well
cleanup some const abuse.
 2020-05-17 00:15:12 -07:00
Henrik Rydgård
f65a71d6d8 Compat: Option to use accurate dotprod for VMMUL. 
Eliminates Tekken 6 leg shaking.
 2019-08-05 11:44:52 -07:00
Henrik Rydgård
f49999efca Revert "ARM64 vmmul experiment: Disable if S and T matrices overlap." 
This reverts commit c4d26dcb10.
 2019-06-06 09:34:23 +02:00
Henrik Rydgård
649b7a5671 ARM64 vmmov experiment: Reduce precision by using FMUL+FADD instead of FMADD. May help #12082 and thus also #11179 and #9843. 2019-06-05 00:02:32 +02:00
Henrik Rydgård
c4d26dcb10 ARM64 vmmul experiment: Disable if S and T matrices overlap. 
If this fixes anything in #12082, we have a regalloc bug I guess...
 2019-06-04 22:24:19 +02:00
Henrik Rydgård
7853c90abb JIT: Split VFPU_MTX disable options. To help with #9843 2019-06-03 23:28:15 +02:00
Unknown W. Brackets
c773359095 arm64jit: Tweak matrix vfpu overlap detect, etc. 
Tried making changes to them to guess at issues for #9843, but didn't find
any.  Still, I think these changes are worthwhile, if small.
 2019-06-02 22:10:20 -07:00
Unknown W. Brackets
1358a80aa6 arm64jit: Fix avoidLoad handling for fpu regs. 2019-06-02 22:03:06 -07:00
Henrik Rydgård
55b4b4b9e3 Style fix 2019-06-02 16:22:19 +02:00
Henrik Rydgård
6fd40332fd JitDisable: Add option to disable regalloc across instructions (flush after every instruction) 2019-06-02 16:06:10 +02:00
M4xw
b9352354c9 Masked PSP Memory support for the AArch64 Dynarec 2019-04-15 12:07:57 +02:00
Unknown W. Brackets
a5214d0b1a Jit: Ignore high bit in vmfvc/vmtvc. 2019-03-31 17:09:55 -07:00
Unknown W. Brackets
5749ae09d0 interp: Correct vmfvc register behavior. 
The target and source registers were completely wrong.
 2019-03-31 13:41:48 -07:00
Unknown W. Brackets
d5273f589a interp: Mask value in vpfxd. 
The actual register ends up with only the lower 12 bits, which makes sense
since those are the only ones that do anything.
 2019-03-31 08:23:36 -07:00
Unknown W. Brackets
6178a1fb33 Jit: Correct vocp prefix handling. 
See #5549.  Matches tests for various prefix settings.
 2019-02-23 09:15:26 -08:00
Henrik Rydgård
c80dd44da8 ARM/ARM64: Ignore invalid immediate addresses in delay slots, which may be conditional. 
Should do something in x86's safe mem too, but leaving for later.

Replaces #11824
 2019-02-23 10:15:09 +01:00
Unknown W. Brackets
d7f40afd9d interp: Correct vocp prefix handling. 
Also, guess that vsocp also applies prefixes.  See #5549.
 2019-02-21 19:02:16 -08:00
Unknown W. Brackets
419c1fbd73 Jit: Respect flags for jit types and features. 
Left some free space for more.
 2019-02-03 14:57:08 -08:00
Unknown W. Brackets
4c3fe47372 jit: Remove unused breakpoint code. 2018-06-06 17:31:56 -07:00
Unknown W. Brackets
eb4b59b530 arm64jit: Enable breakpoints. 
Memory breakpoints not yet really tested.
 2018-06-06 17:31:56 -07:00
Unknown W. Brackets
4861cadb79 arm64jit: Fix reg size in jr delay slot path. 
Can't use the 64-bit reg.
 2018-04-04 06:58:12 -07:00
Unknown W. Brackets
ab809bd19e jit: Apply hasSetRounding at compile time. 
Otherwise, the block will be executed with the wrong rounding mode the
first time rounding is set.  This could be important if it was set for a
single operation.

This is only a problem the first time it's set.
 2018-04-01 10:36:16 -07:00
Unknown W. Brackets
09e307b097 arm64jit: Update rounding mode on thread switch. 
Since fcr31 is per-thread, we must update jit state when it changes.
This also fixes the rounding mode on load state and jit/interp switch.
 2018-04-01 10:12:32 -07:00
Unknown W. Brackets
7d3fac2b4b arm64jit: Fix a case of R() on unmapped. 
But this probably means a game crash anyway...

Attempting to fix #10843.
 2018-03-31 22:34:05 -07:00
Unknown W. Brackets
4fbb68d505 arm64jit: Update some comments. 2018-03-31 21:03:23 -07:00
Henrik Rydgård
468b830bec Show IR disassembly in JIT Compare screen 2018-01-04 12:23:23 +01:00
Unknown W. Brackets
d8d174fa2b arm64jit: Avoid spilling an extra reg for lwl/lwr. 
It's only needed for swl and swr.
 2018-01-01 08:38:10 -08:00