Commit graph

84 commits

Author SHA1 Message Date
Florent Castelli
8c3552de74 cmake: Detect features at compile time
Instead of relying on manually passed down flags from CMake,
we now have ppsspp_config.h file to create the platform defines for us.
This improves support for multiplatform builds (such as iOS).
2016-10-19 12:31:19 +02:00
Unknown W. Brackets
66adc4e695 jit: Normalize CONDITIONAL_DISABLE formatting. 2015-07-02 20:31:37 -07:00
Henrik Rydgård
a897723e6a Separate out jit reading nearby instructions.
This makes it easier to use an IR for these things, or remove them.
2015-04-11 00:53:24 -07:00
Unknown W. Brackets
b0d291032d armjit Avoid cfc1/mfc1 to $0. 2015-04-07 18:30:36 -07:00
Henrik Rydgard
acd9502b44 ARM64: stp/ldp disasm improvements 2015-04-06 18:13:17 +02:00
Henrik Rydgard
0922db6062 ARM64: Some FP work. 2015-04-06 18:13:11 +02:00
Unknown W. Brackets
a62a4a42b3 armjit: handle any known zero in mtc1. 2014-12-28 20:05:29 -08:00
Henrik Rydgard
05a8e2e35d Some work towards being able to build two JITs together
This will be useful for testing/debugging, but not there yet.
2014-12-13 21:13:54 +01:00
Henrik Rydgard
51d55bd645 Namespacing cleanup (it's bad to do "using namespace" in a header) 2014-12-07 14:44:15 +01:00
Henrik Rydgard
4457dca4c9 Rename the ARM Jit class to ArmJit 2014-12-07 14:25:22 +01:00
Henrik Rydgard
ceed0a92c3 Undo some accidental reverts 2014-12-07 00:25:15 +01:00
Henrik Rydgard
ff4746cd17 Merge the rest of the old NEON branch. 2014-12-06 13:14:03 +01:00
Henrik Rydgard
53b5d331b4 Assorted minor optimizations 2014-11-17 21:21:44 +01:00
Unknown W. Brackets
928e2adfc9 jit: Avoid applying/restoring the rounding mode.
If the game never sets it, we can skip around syscalls, interpreter,
replacements, etc.
2014-10-12 12:51:45 -07:00
Unknown W. Brackets
8d0dca71fe jit: Rename the rounding mode funcs to clarify.
They apply/restore the value, set/clear is confusing.
2014-10-12 11:35:20 -07:00
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52b6f1095e armjit: Fix rounding mode, allow non flush-to-zero.
Default: force flush to zero (for RunFast mode.)  But now it's an ini
option so we can more easily compare armjit differences.
2014-09-11 07:58:51 -07:00
Unknown W. Brackets
5f6f6827b5 jit: Update rounding mode immediately on ctc1. 2014-08-30 23:48:27 -07:00
Unknown W. Brackets
820a8e8f2b armjit: Don't reset downcount on fpu instructions.
It's maintained always, oops.
2014-08-30 16:30:13 -07:00
Unknown W. Brackets
1fcbb7bbd4 armjit: Respect the rounding mode for mul/etc. 2014-08-22 00:32:01 -07:00
Unknown W. Brackets
433f4eb00a Use the ARM rounding mode flag for conversions.
It's at least much simpler.  Not sure if faster.  Handles NAN correctly.
2014-06-29 20:36:00 -07:00
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f339f7d539 armjit: Handle NAN correctly in float conversion. 2014-06-29 20:05:59 -07:00
Unknown W. Brackets
c168db5943 armjit: Fix really bad typo in cvt.w.s. 2014-06-29 19:43:17 -07:00
Unknown W. Brackets
f008bebab4 armjit: Fix floor/ceil/cvt.w.s rounding.
Unfortunately, correctly rounding is probably slower.
2014-06-28 00:38:57 -07:00
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acad2e1763 x86jit: Cache fpcond in a register.
Mostly to match armjit.
2014-06-28 00:38:55 -07:00
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5a89c17cf0 armjit: Allow R1 in regalloc, use LR as temp.
LR should be safe, although it may make stack traces not work within jit,
they don't really tend to work anyway.
2014-03-28 18:38:38 -07:00
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05ab192c9c Reduce includes in Core/HLE/.
Especially templates.
2014-03-15 11:22:19 -07:00
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5128083d93 Mask out fcr31 bits that can't be set on a PSP. 2013-11-14 23:57:28 -08:00
Unknown W. Brackets
3c73d0d1f1 armjit: Read fpu control regs other than 0/31 as 0.
Always seem to give zero, regardless of the value of fcr31, etc.
2013-11-14 23:39:39 -08:00
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26f5922174 Return the correct value for fcr0/fir.
This is what the PSP actually returns, it's read only.
2013-11-14 23:39:08 -08:00
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98fb2e0402 armjit: Refer to R11 as MEMBASEREG for clarity. 2013-11-14 23:37:48 -08:00
Sacha
20e8a81268 Switch to compile-time ARMV7 define. 2013-11-15 11:20:39 +10:00
Henrik Rydgård
17074f5a7f Cache fpcond in a register to avoid store/load between compare and branch 2013-11-12 10:33:38 +01:00
Unknown W. Brackets
7e46ee0b0f armjit: Replace MOVI2R with using the regcache.
So that it can optimize the value with existing imms.

Not actually optimizing yet.
2013-11-10 15:50:45 -08:00
Henrik Rydgard
502f772856 Add experimental mode to cache pointers in the arm jit.
Turned off for now as it needs more work but seems quite promising already.
2013-11-09 17:15:30 +01:00
Henrik Rydgard
dff0c431aa ARMjit: Optimize mfc1, mtc1 2013-11-08 12:43:48 +01:00
Henrik Rydgård
9be3f8fc0a Use ANDI2R instead of a BIC with a too large parameter 2013-11-06 10:50:30 +01:00
Sacha
81d3df0841 ARMJIT: Minor optimisations for armv6 and armv7. 2013-11-06 15:28:26 +10:00
Sacha
18b7503dd5 Fix rounding errors in armjit. 2013-10-14 19:24:13 +10:00
Unknown W. Brackets
97aa1a631e Improve typesafety in the x86 regalloc. 2013-08-24 19:41:10 -07:00
Unknown W. Brackets
109ad17ac6 Use a typesafe struct for opcodes.
Also, correctly read delayslots using Read_Instruction on ARM.
2013-08-24 15:36:24 -07:00
Henrik Rydgard
ebcdd637ee ARMJit bugfixes, enable vmul, vadd, vdiv, vsub.
Prefixes disabled until I can fix clamping.
2013-07-31 00:12:43 +02:00
Henrik Rydgard
d8294f025f More VFPU stuff (nothing new activated) 2013-07-30 01:09:11 +02:00
Henrik Rydgard
59644ad59b Jit: Implement VMMUL for ARM, optimize the x86 implementation. Also add VCST. 2013-07-28 12:14:35 +02:00
Henrik Rydgard
2eaf581bbe Add experimental UV prescaling hack, hidden as it's not finished yet.
Most people should ignore this for now, it's a step towards faster skinning in the future.
2013-07-27 23:23:17 +02:00
Henrik Rydgard
afcb5add51 Minor code cleanup/reindent around ARM jit 2013-07-27 22:14:01 +02:00
Unknown W. Brackets
7c238f4567 Avoid a signed/unsigned compare.
This one is pretty pedantic.
2013-07-26 22:50:55 -07:00
Jake Traynham
e89b2055a6 Reenabled armv7s for iOS with JIT fixes 2013-06-20 11:44:59 -05:00
Sacha
583927988c Armjit Update: Improvements
Implement vsat0 and vsat1
Introduce VMOV for immediates.  Use in MOVI2F where possible by detecting if float val can be encoded.
Combine some vneg ops in ApplyPrefixST.
2013-06-09 21:27:16 +10:00
Sacha
f21218c3f9 Armjit: Combine mul.s + neg.s to VNMUL. Implement VNMUL, VNMLA, VNMLS.
I had implemented mul.s + add/sub.s + add/sub.s -> VADD/VSUB + V(N)ML(A/S). Turns out it doesn't happen enough though (once or twice per game).
2013-06-08 16:39:59 +10:00
Sonicadvance1
cd9b49acfd Updates to ArmEmitter from Dolphin. 2013-04-12 10:14:18 -07:00