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https://github.com/hrydgard/ppsspp.git
synced 2025-04-02 11:01:50 -04:00
Minor code cleanup/reindent around ARM jit
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parent
e36e976877
commit
afcb5add51
7 changed files with 110 additions and 126 deletions
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@ -56,10 +56,10 @@ void Jit::Comp_FPU3op(u32 op)
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case 2: { //F(fd) = F(fs) * F(ft); //mul
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u32 nextOp = Memory::Read_Instruction(js.compilerPC + 4);
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// Optimise possible if destination is the same
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if (fd == (int)((nextOp>>6) & 0x1F)) {
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if (fd == ((nextOp>>6) & 0x1F)) {
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// VMUL + VNEG -> VNMUL
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if (!strcmp(MIPSGetName(nextOp), "neg.s")) {
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if (fd == (int)((nextOp>>11) & 0x1F)) {
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if (fd == ((nextOp>>11) & 0x1F)) {
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VNMUL(fpr.R(fd), fpr.R(fs), fpr.R(ft));
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EatInstruction(nextOp);
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}
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@ -106,15 +106,15 @@ void Jit::Comp_FPULS(u32 op)
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ADD(R0, R0, R11);
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}
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#ifdef __ARM_ARCH_7S__
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FixupBranch skip;
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if (doCheck) {
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skip = B_CC(CC_EQ);
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}
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VLDR(fpr.R(ft), R0, 0);
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if (doCheck) {
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SetJumpTarget(skip);
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SetCC(CC_AL);
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}
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FixupBranch skip;
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if (doCheck) {
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skip = B_CC(CC_EQ);
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}
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VLDR(fpr.R(ft), R0, 0);
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if (doCheck) {
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SetJumpTarget(skip);
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SetCC(CC_AL);
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}
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#else
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VLDR(fpr.R(ft), R0, 0);
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if (doCheck) {
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@ -142,15 +142,15 @@ void Jit::Comp_FPULS(u32 op)
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ADD(R0, R0, R11);
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}
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#ifdef __ARM_ARCH_7S__
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FixupBranch skip2;
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if (doCheck) {
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skip2 = B_CC(CC_EQ);
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}
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VSTR(fpr.R(ft), R0, 0);
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if (doCheck) {
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SetJumpTarget(skip2);
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SetCC(CC_AL);
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}
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FixupBranch skip2;
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if (doCheck) {
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skip2 = B_CC(CC_EQ);
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}
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VSTR(fpr.R(ft), R0, 0);
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if (doCheck) {
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SetJumpTarget(skip2);
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SetCC(CC_AL);
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}
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#else
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VSTR(fpr.R(ft), R0, 0);
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if (doCheck) {
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@ -169,8 +169,7 @@ void Jit::Comp_FPUComp(u32 op) {
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CONDITIONAL_DISABLE;
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int opc = op & 0xF;
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if (opc >= 8) opc -= 8; // alias
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if (opc == 0)//f, sf (signalling false)
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{
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if (opc == 0) { // f, sf (signalling false)
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MOVI2R(R0, 0);
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STR(R0, CTXREG, offsetof(MIPSState, fpcond));
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return;
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@ -238,7 +237,6 @@ void Jit::Comp_FPU2op(u32 op)
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int fs = _FS;
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int fd = _FD;
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// logBlocks = 1;
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switch (op & 0x3f)
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{
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@ -314,7 +312,7 @@ void Jit::Comp_mxc1(u32 op)
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int fs = _FS;
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int rt = _RT;
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switch((op >> 21) & 0x1f)
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switch ((op >> 21) & 0x1f)
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{
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case 0: // R(rt) = FI(fs); break; //mfc1
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// Let's just go through RAM for now.
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@ -217,15 +217,15 @@ namespace MIPSComp
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ADD(R0, R0, R11);
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}
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#ifdef __ARM_ARCH_7S__
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FixupBranch skip;
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if (doCheck) {
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skip = B_CC(CC_EQ);
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}
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VLDR(fpr.V(vt), R0, 0);
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if (doCheck) {
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SetJumpTarget(skip);
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SetCC(CC_AL);
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}
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FixupBranch skip;
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if (doCheck) {
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skip = B_CC(CC_EQ);
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}
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VLDR(fpr.V(vt), R0, 0);
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if (doCheck) {
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SetJumpTarget(skip);
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SetCC(CC_AL);
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}
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#else
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VLDR(fpr.V(vt), R0, 0);
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if (doCheck) {
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@ -256,15 +256,15 @@ namespace MIPSComp
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ADD(R0, R0, R11);
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}
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#ifdef __ARM_ARCH_7S__
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FixupBranch skip;
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if (doCheck) {
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skip = B_CC(CC_EQ);
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}
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VSTR(fpr.V(vt), R0, 0);
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if (doCheck) {
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SetJumpTarget(skip);
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SetCC(CC_AL);
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}
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FixupBranch skip;
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if (doCheck) {
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skip = B_CC(CC_EQ);
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}
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VSTR(fpr.V(vt), R0, 0);
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if (doCheck) {
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SetJumpTarget(skip);
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SetCC(CC_AL);
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}
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#else
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VSTR(fpr.V(vt), R0, 0);
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if (doCheck) {
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@ -314,18 +314,18 @@ namespace MIPSComp
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}
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#ifdef __ARM_ARCH_7S__
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FixupBranch skip;
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if (doCheck) {
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skip = B_CC(CC_EQ);
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}
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FixupBranch skip;
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if (doCheck) {
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skip = B_CC(CC_EQ);
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}
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for (int i = 0; i < 4; i++)
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VLDR(fpr.V(vregs[i]), R0, i * 4);
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if (doCheck) {
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SetJumpTarget(skip);
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SetCC(CC_AL);
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}
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if (doCheck) {
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SetJumpTarget(skip);
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SetCC(CC_AL);
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}
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#else
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for (int i = 0; i < 4; i++)
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VLDR(fpr.V(vregs[i]), R0, i * 4);
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@ -364,18 +364,18 @@ namespace MIPSComp
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}
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#ifdef __ARM_ARCH_7S__
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FixupBranch skip;
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if (doCheck) {
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skip = B_CC(CC_EQ);
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}
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FixupBranch skip;
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if (doCheck) {
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skip = B_CC(CC_EQ);
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}
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for (int i = 0; i < 4; i++)
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VSTR(fpr.V(vregs[i]), R0, i * 4);
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if (doCheck) {
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SetJumpTarget(skip);
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SetCC(CC_AL);
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}
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if (doCheck) {
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SetJumpTarget(skip);
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SetCC(CC_AL);
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}
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#else
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for (int i = 0; i < 4; i++)
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VSTR(fpr.V(vregs[i]), R0, i * 4);
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@ -42,4 +42,5 @@
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namespace MIPSComp {
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extern Jit *jit;
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extern const float cst_constants[32];
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}
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@ -15,6 +15,10 @@
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#include <cmath>
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#include <limits>
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#include "math/math_util.h"
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#include "Common.h"
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#include "Core/MIPS/MIPS.h"
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#include "Core/MIPS/MIPSTables.h"
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@ -37,6 +41,48 @@ MIPSState *currentMIPS = &mipsr4k;
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MIPSDebugInterface debugr4k(&mipsr4k);
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MIPSDebugInterface *currentDebugMIPS = &debugr4k;
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#ifndef M_LOG2E
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#define M_E 2.71828182845904523536f
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#define M_LOG2E 1.44269504088896340736f
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#define M_LOG10E 0.434294481903251827651f
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#define M_LN2 0.693147180559945309417f
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#define M_LN10 2.30258509299404568402f
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#undef M_PI
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#define M_PI 3.14159265358979323846f
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#define M_PI_2 1.57079632679489661923f
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#define M_PI_4 0.785398163397448309616f
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#define M_1_PI 0.318309886183790671538f
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#define M_2_PI 0.636619772367581343076f
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#define M_2_SQRTPI 1.12837916709551257390f
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#define M_SQRT2 1.41421356237309504880f
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#define M_SQRT1_2 0.707106781186547524401f
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#endif
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extern const float cst_constants[32] = {
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0,
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std::numeric_limits<float>::max(), // all these are verified on real PSP
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sqrtf(2.0f),
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sqrtf(0.5f),
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2.0f/sqrtf((float)M_PI),
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2.0f/(float)M_PI,
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1.0f/(float)M_PI,
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(float)M_PI/4,
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(float)M_PI/2,
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(float)M_PI,
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(float)M_E,
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(float)M_LOG2E,
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(float)M_LOG10E,
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(float)M_LN2,
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(float)M_LN10,
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2*(float)M_PI,
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(float)M_PI/6,
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log10f(2.0f),
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logf(10.0f)/logf(2.0f),
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sqrtf(3.0f)/2.0f,
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};
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MIPSState::MIPSState()
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{
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MIPSComp::jit = 0;
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@ -194,3 +240,4 @@ void MIPSState::Irq()
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void MIPSState::SWI()
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{
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}
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@ -153,3 +153,5 @@ void MIPS_Shutdown();
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void MIPS_Irq();
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void MIPS_SWI();
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extern const float cst_constants[32];
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@ -1497,35 +1497,11 @@ namespace MIPSInt
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void Int_Vcst(u32 op)
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{
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static const float constants[32] =
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{
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0,
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std::numeric_limits<float>::max(), // all these are verified on real PSP
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sqrtf(2.0f),
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sqrtf(0.5f),
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2.0f/sqrtf((float)M_PI),
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2.0f/(float)M_PI,
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1.0f/(float)M_PI,
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(float)M_PI/4,
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(float)M_PI/2,
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(float)M_PI,
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(float)M_E,
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(float)M_LOG2E,
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(float)M_LOG10E,
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(float)M_LN2,
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(float)M_LN10,
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2*(float)M_PI,
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(float)M_PI/6,
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log10f(2.0f),
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logf(10.0f)/logf(2.0f),
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sqrtf(3.0f)/2.0f,
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};
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int conNum = (op >> 16) & 0x1f;
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int vd = _VD;
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VectorSize sz = GetVecSize(op);
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float c = constants[conNum];
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float c = cst_constants[conNum];
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float temp[4] = {c,c,c,c};
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ApplyPrefixD(temp, sz);
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WriteVector(temp, sz, vd);
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@ -47,23 +47,6 @@
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#define _SIZE ((op>>11 ) & 0x1F)
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#ifndef M_LOG2E
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#define M_E 2.71828182845904523536f
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#define M_LOG2E 1.44269504088896340736f
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#define M_LOG10E 0.434294481903251827651f
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#define M_LN2 0.693147180559945309417f
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#define M_LN10 2.30258509299404568402f
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#undef M_PI
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#define M_PI 3.14159265358979323846f
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#define M_PI_2 1.57079632679489661923f
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#define M_PI_4 0.785398163397448309616f
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#define M_1_PI 0.318309886183790671538f
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#define M_2_PI 0.636619772367581343076f
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#define M_2_SQRTPI 1.12837916709551257390f
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#define M_SQRT2 1.41421356237309504880f
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#define M_SQRT1_2 0.707106781186547524401f
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#endif
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using namespace Gen;
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namespace MIPSComp
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@ -579,29 +562,6 @@ void Jit::Comp_Vi2f(u32 op) {
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fpr.ReleaseSpillLocks();
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}
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static const float cst_constants[32] = {
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0,
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std::numeric_limits<float>::max(), // all these are verified on real PSP
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sqrtf(2.0f),
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sqrtf(0.5f),
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2.0f/sqrtf((float)M_PI),
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2.0f/(float)M_PI,
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1.0f/(float)M_PI,
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(float)M_PI/4,
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(float)M_PI/2,
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(float)M_PI,
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(float)M_E,
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(float)M_LOG2E,
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(float)M_LOG10E,
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(float)M_LN2,
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(float)M_LN10,
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2*(float)M_PI,
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(float)M_PI/6,
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log10f(2.0f),
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logf(10.0f)/logf(2.0f),
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sqrtf(3.0f)/2.0f,
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};
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void Jit::Comp_Vcst(u32 op) {
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CONDITIONAL_DISABLE;
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