9 commits

Author	SHA1	Message	Date
Unknown W. Brackets	1a92027810	riscv: Make Vec4Shuffle overlap safe.	2023-08-08 23:00:45 -07:00
Unknown W. Brackets	79ca880ac7	irjit: Implement vqmul, add Vec4Blend. ... Should be useful more places.	2023-08-06 13:38:00 -07:00
Unknown W. Brackets	93e3d35f5d	irjit: Move more to IRNativeBackend, split.	2023-08-06 00:16:43 -07:00
Unknown W. Brackets	921bd2391c	riscv: Implement vi2s.	2023-07-29 19:02:15 -07:00
Unknown W. Brackets	0c9dce8ba8	riscv: Implement vec4 dot.	2023-07-25 20:33:56 -07:00
Unknown W. Brackets	23e9dffc68	riscv: Implement vec4 shuffle and init.	2023-07-25 20:33:56 -07:00
Unknown W. Brackets	4e17c59cc2	riscv: Implement simple vec4 ops via floats.	2023-07-25 20:33:56 -07:00
Unknown W. Brackets	c2da7d18bb	riscv: Stub out more IR compilation categories.	2023-07-23 18:01:00 -07:00
Unknown W. Brackets	bf7a6eb2cd	riscv: Add jit for some initial instructions.	2023-07-23 18:01:00 -07:00