Henrik Rydgard
|
b7725c4f40
|
Remove empty header files
|
2015-10-08 18:54:33 +02:00 |
|
Henrik Rydgard
|
bfed830f91
|
Remove the ability to disable rounding mode support. It's time.
|
2015-10-08 14:54:42 +02:00 |
|
Henrik Rydgard
|
6dd86cd843
|
Get rid of the ForceFlushToZero hidden config option
|
2015-10-08 14:54:41 +02:00 |
|
Unknown W. Brackets
|
9262ddfc13
|
Avoid any possible shifts by 32.
|
2015-07-19 13:25:50 -07:00 |
|
Henrik Rydgard
|
dc2f6a30fb
|
ARM64: Fix joining of lwl/lwr and swl/swr. "implement" the cache instruction.
|
2015-07-11 16:25:22 +02:00 |
|
Henrik Rydgard
|
f50828a66a
|
ARM32 JIT: Implement vs2i, vus2i, vc2i (but not vuc2i)
|
2015-07-11 00:37:57 +02:00 |
|
Henrik Rydgard
|
cd1665e8f6
|
ARM32 jit: Implement vi2s, vi2c (but not the unsigned variants yet). uses the new shifts from the last commit
|
2015-07-09 00:27:12 +02:00 |
|
Unknown W. Brackets
|
db3dffb44d
|
arm64: Oops, fix flushing zero from an armreg.
|
2015-07-05 11:57:18 -07:00 |
|
Unknown W. Brackets
|
003668fe66
|
armjit: Fix discarding imms.
|
2015-07-04 07:30:32 -07:00 |
|
Unknown W. Brackets
|
e6a7ba3fae
|
arm64: Bring imms along for the STP ride.
|
2015-07-03 16:51:33 -07:00 |
|
Henrik Rydgård
|
82c66bc463
|
Merge pull request #7840 from unknownbrackets/arm64-micro
Flush using STP where possible in ARM64
|
2015-07-03 23:20:43 +02:00 |
|
Unknown W. Brackets
|
8fdceba7ca
|
Add timing for all the basics.
This way we can see overall stats for a frame.
|
2015-07-03 12:05:08 -07:00 |
|
Unknown W. Brackets
|
2331df8c70
|
arm64: Try to be more consistent in ZERO handling.
Let's keep it IMM where possible, even though we've added checks for
MIPS_REG_ZERO.
|
2015-07-03 10:21:24 -07:00 |
|
Unknown W. Brackets
|
66adc4e695
|
jit: Normalize CONDITIONAL_DISABLE formatting.
|
2015-07-02 20:31:37 -07:00 |
|
Unknown W. Brackets
|
fed687fb59
|
arm64: Meld LO and HI together for multiplies.
|
2015-07-02 20:31:37 -07:00 |
|
Unknown W. Brackets
|
213ad4bcc9
|
arm64: Cleanup branch code a tiny bit.
Want to make it clear that we can't kill W0 at this point (delay slots.)
|
2015-06-28 09:28:54 -07:00 |
|
Unknown W. Brackets
|
0a5b1c030b
|
arm64: Implement ext and ins.
|
2015-06-28 08:45:17 -07:00 |
|
Henrik Rydgård
|
70fa830ba5
|
Split out the ReplaceJalTo test logic.
This makes it so the IR, in the future, can work correctly for
replacements.
|
2015-04-12 13:35:10 -07:00 |
|
Henrik Rydgård
|
d014d420db
|
Unify JitOptions across the backends.
This is required to make ExtractIR not a member of the various backends.
|
2015-04-12 11:41:26 -07:00 |
|
Henrik Rydgård
|
7bf67509d1
|
ARM: Cleanup a TODO in NEON VFPU.
|
2015-04-12 11:21:53 -07:00 |
|
Henrik Rydgård
|
81dec36da8
|
Use an accessor to read the compilerPC.
In the IR it will be read from the block.
|
2015-04-11 01:14:37 -07:00 |
|
Henrik Rydgård
|
a897723e6a
|
Separate out jit reading nearby instructions.
This makes it easier to use an IR for these things, or remove them.
|
2015-04-11 00:53:24 -07:00 |
|
Unknown W. Brackets
|
b0d291032d
|
armjit Avoid cfc1/mfc1 to $0.
|
2015-04-07 18:30:36 -07:00 |
|
Unknown W. Brackets
|
7ce5841f30
|
jit: Avoid mfhi/mflo to $0.
|
2015-04-07 18:25:28 -07:00 |
|
Unknown W. Brackets
|
788b9d78f8
|
jit: Avoid a super unlikely write to zero.
|
2015-04-07 18:20:37 -07:00 |
|
Henrik Rydgård
|
fbaffdceab
|
Remove some outdated comments, minor stuff
|
2015-04-06 18:13:36 +02:00 |
|
Henrik Rydgard
|
acf08eefa8
|
ARM64: Fix FCVTL, use it in v2hf
|
2015-04-06 18:13:33 +02:00 |
|
Henrik Rydgard
|
2780eef595
|
ARM64: Another couple of VFPU ops
|
2015-04-06 18:13:31 +02:00 |
|
Henrik Rydgard
|
1b1ab73b0f
|
ARM64: Enable some more VFPU instructions, some code cleanup
|
2015-04-06 18:13:29 +02:00 |
|
Henrik Rydgard
|
500ca94ab8
|
ARM64: Port over tons of VFPU code from ARM, leave most of it disabled.
|
2015-04-06 18:13:28 +02:00 |
|
Henrik Rydgard
|
25ec85551f
|
ARM64: Implement FP compares, misc
|
2015-04-06 18:13:22 +02:00 |
|
Henrik Rydgard
|
a12e448fb4
|
ARM64: Stub vertex decoder jit, implementing just enough for the cube.elf cube.
|
2015-04-06 18:13:18 +02:00 |
|
Henrik Rydgard
|
acd9502b44
|
ARM64: stp/ldp disasm improvements
|
2015-04-06 18:13:17 +02:00 |
|
Henrik Rydgard
|
0922db6062
|
ARM64: Some FP work.
|
2015-04-06 18:13:11 +02:00 |
|
Henrik Rydgard
|
58b059ca14
|
Some casting cleanup, misc
|
2015-04-06 18:13:06 +02:00 |
|
Unknown W. Brackets
|
98d7afae89
|
Switch to #pragma once in a few places.
Doesn't really affect git history much to change these.
|
2015-03-02 22:34:51 -08:00 |
|
Unknown W. Brackets
|
179e996b0b
|
jit: Discard unused regs before a syscall.
This is a pretty minor optimization, though.
|
2015-03-01 11:08:59 -08:00 |
|
Unknown W. Brackets
|
19b92a3e68
|
Typo.
|
2015-01-19 09:41:35 -08:00 |
|
Unknown W. Brackets
|
cdddd4b59c
|
Fix an undefined bit shift.
Shouldn't have mattered anyway, but maybe this can crash some ARM chip or
something...
|
2015-01-19 08:40:10 -08:00 |
|
Unknown W. Brackets
|
dcf54ec8a0
|
armjit: Burn less hard without a quad mapping.
|
2015-01-17 18:48:50 -08:00 |
|
Unknown W. Brackets
|
c0a04cbf7e
|
armjit: Fix first temp vreg offset.
Wonder what havoc this could've caused....
|
2015-01-17 18:21:04 -08:00 |
|
Unknown W. Brackets
|
ab978b1eb1
|
armjit: Fix vfad/vavg sign for -0.000.
But, NEON is still broken pretty bad, not sure why.
|
2015-01-03 11:14:52 -08:00 |
|
Unknown W. Brackets
|
a62a4a42b3
|
armjit: handle any known zero in mtc1.
|
2014-12-28 20:05:29 -08:00 |
|
Unknown W. Brackets
|
cb50075cf9
|
armjit: Correct NEON/non-VFPU reg allocation order.
This fixes vh2f, which unbreaks games like Dissidia 012 and others.
|
2014-12-22 21:27:27 -08:00 |
|
Unknown W. Brackets
|
afdbf5610b
|
jit: Use nicknames for a few more static regs.
|
2014-12-17 01:11:33 -08:00 |
|
Henrik Rydgard
|
b2951f0def
|
Transplant Dolphin's ARM64 emitter over. Not hooked up to anything (yet...)
|
2014-12-15 22:09:26 +01:00 |
|
Unknown W. Brackets
|
9a41dec0ff
|
Fix some type comparison warnings.
|
2014-12-14 17:35:20 -08:00 |
|
Unknown W. Brackets
|
cb7e7643db
|
Blackberry buildfix.
|
2014-12-13 19:38:04 -08:00 |
|
Henrik Rydgard
|
32a452d671
|
Blackberry buildfix, added a commen this time..
|
2014-12-13 22:14:53 +01:00 |
|
Henrik Rydgard
|
5de011fe95
|
Again, sigh..
|
2014-12-13 21:53:28 +01:00 |
|