Commit graph

91 commits

Author SHA1 Message Date
Henrik Rydgard
6483c0c2cd Two minor armjit optimizations 2013-11-05 16:25:01 +01:00
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732ae13ebb Fast path CallSyscall where possible.
It seems we're spending a decent amount of time there, which isn't
entirely unexpected.  We can eliminate some things easily.
2013-11-04 07:59:37 -08:00
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9a707f6c00 Fix typo, ARM build. 2013-10-17 15:28:50 -07:00
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2e8ef3027f Write the retaddr to rd, not always ra, in jalr.
Thanks go entirely to @Kingcom for pointing this out.

Don't know of any games not using RA as the rd.
2013-10-17 07:39:33 -07:00
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3a1b6fb269 Fix some sign comparison warnings. 2013-10-05 11:13:41 -07:00
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97aa1a631e Improve typesafety in the x86 regalloc. 2013-08-24 19:41:10 -07:00
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109ad17ac6 Use a typesafe struct for opcodes.
Also, correctly read delayslots using Read_Instruction on ARM.
2013-08-24 15:36:24 -07:00
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8327cd0f8e Clean up some inconsistency in jit branches on arm. 2013-08-16 02:02:56 -07:00
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2758634a0f Avoid overhead calling __KernelIdle().
~1.8% improvement in Zettai Hero Project.
2013-08-15 01:35:17 -07:00
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5387e5c717 Oops, typo. 2013-08-15 00:38:53 -07:00
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df50e03146 Add a safety log for cases we don't handle right. 2013-08-14 23:14:25 -07:00
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e639f8d15f Handle branches in VFPU delay slots better.
Based on tests on a PSP, all branches are attempted.  The behavior is
technically undefined.

It seems to take the delay slot's target if they differ and both pass.
This is the behavior the interpreter has, but it's more work in jit.

Since only a couple games seem to do this, and clearly expect this
behavior, this fixes all known cases of #1926.
2013-08-14 22:56:02 -07:00
Henrik Rydgard
76a937f489 ARMJIT Experiment: Keep downcount in a register. Needs benchmarking. 2013-07-27 17:27:26 +02:00
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c9c3bc83e4 Log more info about branches in delay slots. 2013-06-30 13:19:27 -07:00
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a640ac4001 Bail out on a delay slot in VFPU on arm also.
Otherwise we loop infinitely.

Workaround for #1926.  Should fix #1679.
2013-06-03 00:06:24 -07:00
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5595146f56 Add reporting for jumps in delay slots. 2013-05-26 20:30:14 -07:00
Henrik Rydgard
9eace8a80e Combine the two JitCache implementations (x86, ARM) into one. 2013-04-27 01:32:03 +02:00
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ed76563973 Don't bother checking nice, just do it after. 2013-03-11 02:18:27 -07:00
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b5fe67eb3d If the out is RA, delay slot isn't nice for jal.
Fixes Phantasy Star Portable 2 in jit.
2013-03-11 02:14:38 -07:00
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d525abbcad Cleanup some indentation, more compares to 0. 2013-03-07 02:08:45 -08:00
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028e85dc92 Cleanup some differences between the two jits. 2013-03-07 02:08:44 -08:00
Sacha
268d16bd24 Use correct args for STR(..) throughout armjit. 2013-03-07 00:59:07 +10:00
Henrik Rydgard
81589b67e5 Save one instruction on jal, shorten block exits by one instruction (moved to dispatcher). 2013-02-15 23:37:59 +01:00
Henrik Rydgard
048cf35922 More ARMJit FPU work - some instructions and optimizations. 2013-02-14 00:02:09 +01:00
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44b5adeaac Properly jit the break instruction.
Otherwise, it just keeps on going past it.
We never want to hit this anyway, but it's good to know if we do.
2013-02-01 00:49:14 -08:00
Henrik Rydgard
d8f4e27926 Rename ARMABI_MOVI2R to MOVI2R 2013-01-31 23:41:05 +01:00
Henrik Rydgard
c97f63a9d9 Minor armjit opt 2013-01-30 20:01:42 +01:00
Henrik Rydgard
739b76a55a Armjit: branch code cleanup #1 2013-01-30 01:05:36 +01:00
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dbe597ce64 Buildfix Android, darn. 2013-01-22 08:23:27 -08:00
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c324983340 Make the jit support bltzal and friends.
Fixes problems with jit in games.  Android changes completely untested.
2013-01-22 08:04:01 -08:00
Henrik Rydgard
bc9c3db303 Armjit: Add option for fastmem. Small optimization. 2013-01-11 17:25:54 +01:00
Henrik Rydgard
dafe2c389c More regalloc fixing and tweaks. Still not working the way I want it. 2013-01-09 13:38:44 +01:00
Henrik Rydgard
dafc9f62df Regcache fixes, etc. thing still don't work when I turn on addiu :( 2013-01-09 11:20:48 +01:00
Henrik Rydgard
f5c94775b9 Cleanup 2013-01-09 00:12:02 +01:00
Henrik Rydgard
76481a300c Icache must be invalidated. Jit now starts to run, but there's no cube in cube.elf! 2013-01-08 23:52:11 +01:00
Henrik Rydgard
8915677241 More progress but it weirds out... 2013-01-08 21:24:42 +01:00
Henrik Rydgard
8c06edc47b It's getting close to the first totally unoptimized jit run. 2013-01-08 17:03:17 +01:00
Henrik Rydgard
b78ad83f00 R10, not R9, points to the mips state... 2013-01-08 14:29:03 +01:00
Henrik Rydgard
b3fd1ff34c Lots of various work on the ARM jit. It executes a couple of blocks now. 2013-01-08 13:49:52 +01:00
Henrik Rydgard
5a7f4acc06 More armjit work 2013-01-08 00:26:42 +01:00
Henrik Rydgard
a2ff416534 Rename files. Rewrite ArmRegCache from scratch. 2013-01-07 22:33:09 +01:00
Renamed from Core/MIPS/ARM/CompBranch.cpp (Browse further)