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135 commits

Author SHA1 Message Date
Henrik Rydgard
2d8429ac48 Assorted cleanup in the MIPS emulation 2013-12-10 13:15:16 +01:00
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5d2ff64252 Support for modified jit-enabled VerySleepy. 
This allows profiling the jit.  Should have zero perf impact when not
in use, since it's entirely triggered by VerySleepy.
 2013-11-30 19:20:21 -08:00
Henrik Rydgard
ab3037112f Some scaffolding for a future VFPU-on-NEON implementation 2013-11-19 21:41:48 +01:00
Henrik Rydgard
5bb3824dcf Implement vocp on ARM and x86. 2013-11-19 21:41:47 +01:00
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359110f010 x86/armjit: Add jump following (off by default.) 
Inlines function calls up to a certain extent.  Allows us to get
immediates all the way to a syscall, for example, usually.

Not sure if faster.
 2013-11-10 21:59:49 -08:00
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aacb31bc18 armjit: Copy over (disabled) immbranch optim. 
This does a little loop unrolling.  Costs a bit more cache space, but
avoids flushing regs for longer.

Not enabled.
 2013-11-10 21:59:48 -08:00
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455a7e090d Compile the cache instruction to nothing. 
Was showing up in a few profiles, does nothing currently.
 2013-11-10 14:38:10 -08:00
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06c8cb9174 armjit: Do shifts with imms as much as possible. 
This may even make an imm operand2 safe that wasn't before.
 2013-11-10 14:38:08 -08:00
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b310edc5f8 Fix typo in ARM debug build. 2013-11-09 15:58:27 -08:00
Henrik Rydgard
0a844ce98d Delete functions for vsge and vslt, these have been rolled into VecDo3 2013-11-09 19:29:52 +01:00
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4026944b02 armjit: Handle lwl/lwr (not pretty, though.) 2013-11-09 08:42:30 -08:00
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cb3bb73148 armjit: Improve GPR typesafety. 2013-11-09 08:24:15 -08:00
Henrik Rydgard
502f772856 Add experimental mode to cache pointers in the arm jit. 
Turned off for now as it needs more work but seems quite promising already.
 2013-11-09 17:15:30 +01:00
Henrik Rydgard
04451623b9 This variant didn't seem to make much difference either (see prev commit) 2013-11-09 13:06:10 +01:00
Henrik Rydgard
15bc5a8db7 Add small ARM perf experiment. Did not help on ARMv7 so turned it off. 
xsacha might want to try it on ARMv6.
 2013-11-09 12:57:07 +01:00
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5d46a82f43 armjit: Use a MOV for add/or with 0. 
Might skip the ALU, so might be faster.
 2013-11-08 11:41:57 -08:00
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376918c408 armjit: Reverse add t0, N, t1 to preserve imm. 2013-11-08 11:41:55 -08:00
Henrik Rydgard
309f904c0c Extract JitState into its own header (arm/x86) 2013-11-08 18:51:52 +01:00
Henrik Rydgard
6eb7f94065 Implement vsgn in x86/x64 and ARM jit 2013-11-07 15:29:13 +01:00
Henrik Rydgard
aa3cf34fc1 Jit: Fix valgrind warnings. 
The first time PrefixStart was entered with startDefaultPrefix = true, it would
call EatPrefix, which checks the so far entirely uninitialized prefixXFlags.
 2013-10-16 22:33:48 +02:00
Henrik Rydgard
41a988774f ARM: implement vhdp 2013-09-28 20:07:57 +02:00
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b558189c37 Just invalidate blocks on ClearCacheAt(). 
This makes it safe to call from a jitted syscall, etc.
 2013-09-01 00:32:43 -07:00
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109ad17ac6 Use a typesafe struct for opcodes. 
Also, correctly read delayslots using Read_Instruction on ARM.
 2013-08-24 15:36:24 -07:00
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8327cd0f8e Clean up some inconsistency in jit branches on arm. 2013-08-16 02:02:56 -07:00
Henrik Rydgard
4e8958f42d A small optimization, a few jit stubs, and cross/quat product on x86. 2013-08-01 00:15:08 +02:00
Henrik Rydgard
0a8f85a919 Some JIT cleanup, implement VI2F on ARM. also disabled untested impl of viim for x86. 2013-07-31 17:27:04 +02:00
Henrik Rydgard
51596b636a Fix numerous ARM JIT bugs. Activate vmtvc and vscl, and vadd/vmul/vdiv/vsub for real this time. 2013-07-31 10:34:58 +02:00
Henrik Rydgard
e93c2abe27 x86 jit: implement vfim. Move some stuff to native. cleanup for armjit logging 2013-07-30 22:28:05 +02:00
Henrik Rydgard
ee215cc316 ARMJIT: Fix eatprefix, add DirtyInInV mapping, misc stuff 2013-07-30 18:15:48 +02:00
Henrik Rydgard
d8294f025f More VFPU stuff (nothing new activated) 2013-07-30 01:09:11 +02:00
Henrik Rydgard
8feeaf2e7a Jit: Implement vidt in both, plus translate a couple easy ones to ARM. 2013-07-28 16:14:21 +02:00
Henrik Rydgard
76a937f489 ARMJIT Experiment: Keep downcount in a register. Needs benchmarking. 2013-07-27 17:27:26 +02:00
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d823989330 Implement vmone/vmzero/vmidt for the x86 jit. 2013-07-04 18:16:57 -07:00
Henrik Rydgard
ce2c18d2fe Remove redundant vmov instructions (seen in wipeout) 2013-06-15 00:19:48 +02:00
Sacha
6712de1136 Armjit: Implement wsbh and wsbw (rev16 and rev). Fix encoding for rev16. 2013-06-05 11:32:44 +10:00
Henrik Rydgard
1a1c161a0d Implement vmin/vmax in x86 jit, slots right into VecDo3 2013-04-27 20:52:42 +02:00
Henrik Rydgard
6f4ad05582 Remove some unused code, add some stubs to vfpu jit, some cleanup 2013-04-27 19:35:42 +02:00
Henrik Rydgard
78fe42fe80 Buildfix 2013-04-27 12:04:42 +02:00
Henrik Rydgard
9eace8a80e Combine the two JitCache implementations (x86, ARM) into one. 2013-04-27 01:32:03 +02:00
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3bb5651ca7 Initial x86 jit for vtfm/vhtfm. 2013-04-20 01:52:06 -07:00
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9245490b53 Initial / simple vmscl for x86 jit. 2013-04-20 01:34:16 -07:00
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29109d25af Non-optimal vmmul for x86 jit. 
It's faster than interpreter anyway, but it could be much better.
 2013-04-20 01:15:15 -07:00
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cfac7324d6 Implement vscl in the x86 jit. 2013-04-20 01:15:14 -07:00
Aapo Rantalainen
2b965a6f03 Maemo5 support 2013-03-22 09:15:00 +02:00
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6ef5f4c8dc armjit: Refactor slowmem path for reusing it. 2013-03-16 14:37:35 -07:00
Henrik Rydgard
216dc7ad65 Optimize some common ops for immediates 2013-03-10 00:48:44 +01:00
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c4ab0855b4 Make sure interpreter and jit savestates match. 2013-03-08 08:49:21 -08:00
Sacha
9152d2f2bb Armjit: Optimise swl+swr and lwl+lwr cases that can be combined to a single sw or lw. Add shift flags to STR/LDR. Add EatInstruction to ArmJit. 2013-03-06 02:11:36 +10:00
Sacha
4a56ebd0a0 Armjit: Add sllv, srlv, srav instructions (reg shift). 2013-03-05 13:52:03 +10:00
Henrik Rydgard
650c02c3a5 Some more armjit work (ext, ins) and VFPU prefix clamps (not enabled) 2013-03-03 17:36:22 +01:00