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Author SHA1 Message Date
Paul Holden
468344a626 Clean up last few direct uses of gprLo. 2023-09-23 22:17:54 +01:00
Paul Holden
ebde3743a4 Use register accessors for LWL, LWR, SWL, SWR. 2023-09-23 22:17:54 +01:00
Paul Holden
66ff7291c3 Use register accessors for SLTI, SLTIU. 2023-09-23 22:17:54 +01:00
Paul Holden
88ee3d6879 Use register accessors for JALR, JR. 2023-09-23 22:17:54 +01:00
Paul Holden
671a2cd53b Remove memaddr 2023-09-23 22:17:54 +01:00
Paul Holden
fe500fcbcf Force r0 to be zero. 
Needed for n64-systemtest but not needed for most real roms.
 2023-09-23 22:17:54 +01:00
Paul Holden
8d0c2334d4 Use register accessors for CFC1. 2023-09-23 22:17:54 +01:00
Paul Holden
3e9f340a24 Replace setSignExtend with cpu0.setGPR_s32_signed. 2023-09-23 22:17:54 +01:00
Paul Holden
2375e05bed Use register accessors for SB, SH, SW, SD. 2023-09-23 22:17:54 +01:00
Paul Holden
250dbd924f Use register accessors for LL, LLD, SC, SCD. 2023-09-23 22:17:54 +01:00
Paul Holden
bfb8bd033a Use register accessors for LD. 2023-09-23 22:17:54 +01:00
Paul Holden
3f187d443a Use register accessors for ANDI, ORI, XORI. 2023-09-23 22:17:54 +01:00
Paul Holden
b280172751 Use register accessors for SLTI and SLTIU. 2023-09-23 22:17:54 +01:00
Paul Holden
b900192668 Use register accessors for MFHI and MFLO. 2023-09-23 22:17:54 +01:00
Paul Holden
df0d349b8d Use register accessors for branches. 2023-09-23 22:17:54 +01:00
Paul Holden
1e75b78672 Implement SLT and SLTU using BigInt. 2023-09-23 22:17:54 +01:00
Paul Holden
0982698644 Use register accessors for AND, OR, XOR, NOR. 2023-09-23 22:17:54 +01:00
Paul Holden
7218f713fa Use register accessors for ADD, ADDU, SUB, SUBU. 2023-09-23 22:17:54 +01:00
Paul Holden
d390906445 Use register accessors for DIV and DIVU. 2023-09-23 22:17:54 +01:00
Paul Holden
93b2da6f7e Use register accessors for MTHI, MTLO, MULT, MULTU. 2023-09-23 22:17:54 +01:00
Paul Holden
8cea65f316 Simplify DLLV, DSRLV, DSRAV using BigInt. 2023-09-23 22:17:54 +01:00
Paul Holden
82b71d3072 Simplify DSLL, DSRL, DSRA, DSLL32, DSRL32, DSRA32 using BigInt. 2023-09-23 22:17:54 +01:00
Paul Holden
83e0ea44dc Add a TODO. 2023-09-23 22:17:54 +01:00
Paul Holden
49993eb46a Tidy SLLV, SRLV, SRAV. 2023-09-23 22:17:54 +01:00
Paul Holden
9c8c1b0a48 Tidy SLL, SRL, SRA. 2023-09-23 22:17:54 +01:00
Paul Holden
5751671adb Add raiseAdELException. 2023-09-23 22:17:54 +01:00
Paul Holden
74876b6dba Change dynarec to access registers via CPU0 helpers. 
This might be a bit slower but we can later make it use something like genSrcRegLo to optimise.
 2023-09-23 22:17:54 +01:00
Paul Holden
dff130aa79 Implement SRA using BigInts. 
This might be a bit slower, but it's less fiddly.
 2023-09-23 22:17:54 +01:00
Paul Holden
d5bf8fd356 Add some helpers to encapsulate gprLo access. 
The idea is to route everything through this so we can unify low/high registers and provide BigInt accessors.
 2023-09-23 22:17:54 +01:00
Paul Holden
f6ef7c1a26 Tidy DSLLV, DSRLV, DSRAV. 2023-09-23 22:17:54 +01:00
Paul Holden
855a973f2e Tidy CPU0 constructor. 
ArrayBuffers don't need to be stored as members.
 2023-09-23 22:17:54 +01:00
Paul Holden
84c725cc3d Tidy MFC1, DMFC1, CMTC1 2023-09-23 22:17:54 +01:00
Paul Holden
69109960aa Tidy SB, SH, SW, SD, SWC1, SDC1. 2023-09-23 22:17:54 +01:00
Paul Holden
69b8067367 Tidy LUI, LB, LBU, LH, LHU, LW, LWU. 2023-09-23 22:17:54 +01:00
Paul Holden
b609c74e06 Tidy SLLV, SRLV, SRAV. 2023-09-23 22:17:54 +01:00
Paul Holden
9b568f1c65 Tidy SLL, SRL, SRA. 2023-09-23 22:17:54 +01:00
Paul Holden
96e8467c45 Implement integer overflow exceptions. 2023-09-23 22:17:54 +01:00
Paul Holden
f1395a4426 Add cop2 and cop3 disassembly. 2023-09-23 22:17:54 +01:00
Paul Holden
b784a74ed8 Fix toString64_bigint - this was truncating the bigints and we really want to see all of it. 2023-09-23 22:17:54 +01:00
Paul Holden
d00dc177f2 Fix branch and link instructions - these should check the condition before updating the register. 2023-09-23 22:17:54 +01:00
Paul Holden
f5effadf1b setZeroExtend is unused. 2023-09-23 22:17:54 +01:00
Paul Holden
c9a0a3bfb6 Implement cop2 and cop3. 2023-09-23 22:17:54 +01:00
Paul Holden
319081564e MFC0 should sign extend. 2023-09-23 22:17:54 +01:00
Paul Holden
e32ccb7e5a Tidy opcode initialisation. 2023-09-23 22:17:54 +01:00
Paul Holden
bbd27f91af Move regImmTableGen next to regImmTable. 2023-09-23 22:17:54 +01:00
Paul Holden
690c697e92 Move specialTableGen next to specialTable. 2023-09-23 22:17:54 +01:00
Paul Holden
57caeadbeb Removing noisy 'cop1 unusable' logging. 2023-09-23 22:17:54 +01:00
Paul Holden
a506bde3e8 DCFC1 and DCTC1 generate unimplemented FP exception. 2023-09-23 22:17:54 +01:00
Paul Holden
78a56469fa Throw cop1 unusable for LWC1/LDC1/SWC1/SDC1. 2023-09-23 22:17:54 +01:00
Paul Holden
f5ed39752e Tidy CTC1 - cop1 usable check is done via executeCop1_disabled. 2023-09-23 22:17:54 +01:00