Commit graph

1733 commits

Author SHA1 Message Date
Paul Holden
d743569c2b Mask writes to the wired register. 2023-09-23 22:17:54 +01:00
Paul Holden
cd5c322660 Mask out the writable bits of the context register. 2023-09-23 22:17:54 +01:00
Paul Holden
66c5eb50b9 Add placeholder implementations for DMTC0 and DMTC0 2023-09-23 22:17:54 +01:00
Paul Holden
0d6d41c628 Fix MTC0/MFC0 for invalid registers.
Reads from invalid control registers will use the value last written to any control register.
2023-09-23 22:17:54 +01:00
Paul Holden
e380399f4f Ignore SYNC (is a nop on Vr4300). 2023-09-23 22:17:54 +01:00
Paul Holden
5ba3732798 Remove generateShiftVariable and just inline directly. 2023-09-23 22:17:54 +01:00
Paul Holden
1727fe9ddb Fix SRAV.
Just like SRA this seems to shift the entire 64 bit reg, trunc to 32 bits, then sign extend.
2023-09-23 22:17:54 +01:00
Paul Holden
19888644ed Explicitly generate SLL. 2023-09-23 22:17:54 +01:00
Paul Holden
36d21ca48e Explicitly generate SRL. 2023-09-23 22:17:54 +01:00
Paul Holden
2cfba1933d Fix SRA.
This reads all 64 bits, shifts, then sign extends the 32 bit result.
2023-09-23 22:17:54 +01:00
Paul Holden
ddfe39ac2d Fix missing closing paren in CVT.S.L. 2023-09-23 22:17:54 +01:00
Paul Holden
738c777b33 Template string. 2023-09-23 22:17:54 +01:00
Paul Holden
94af52b4f0 Fix DSLLV, DSRLV, DSRAV with zero shifts.
JS does not like 32 bit shifts.
2023-09-23 22:17:54 +01:00
Paul Holden
f1b6d30664 Add some missing cop0 control reg names. 2023-09-23 22:17:54 +01:00
Paul Holden
05bd621b92 Implement LL, LLD, SC, SCD. 2023-09-23 22:17:54 +01:00
Paul Holden
2cf1ea202d Fix DDIVU (mixing BigInt and Number). 2023-09-23 22:17:54 +01:00
Paul Holden
f02b84d970 Fix DSRL. 2023-09-23 22:17:54 +01:00
Paul Holden
09d5420124 Fix DSRA. 2023-09-23 22:17:54 +01:00
Paul Holden
0b7f17c492 Fix DSLL32.
This was clobbering the register before reading from it.
2023-09-23 22:17:54 +01:00
Paul Holden
e05f75783b Fix DSUB (undefined helper). 2023-09-23 22:17:54 +01:00
Paul Holden
0a78e69fb0 Fix DSLL for shift of 32.
JS treats >>>32 as >>> 0.
2023-09-23 22:17:54 +01:00
Paul Holden
234dd4f712 Include address and value in failed rom accesses. 2023-09-23 22:17:54 +01:00
Paul Holden
c3193a497c Tidy LWL, LWR, SWL, SWR. 2023-09-23 22:17:54 +01:00
Paul Holden
7ba8c6e0f2 Print md5 on boot. 2023-09-23 22:17:54 +01:00
Paul Holden
8bf8e4c653 Add TODO for LDL/SDR. 2023-09-23 22:17:54 +01:00
Paul Holden
4ad1725891 Add save type for 56a48bb9af762b5b. 2023-09-23 22:17:54 +01:00
Paul Holden
a5ef6d797b Add LDL, LDR, SDL, SDR. 2023-09-23 22:17:54 +01:00
Paul Holden
7e2d603b9f Add toString64_bigint. 2023-09-23 22:17:54 +01:00
Paul Holden
9b6ce31c3e Add MD5 support, based on https://github.com/blueimp/JavaScript-MD5.
I've modified this to take ArrayBuffers rather than raw strings, which avoids a lot of character encoding pain.
2023-09-23 22:17:54 +01:00
Paul Holden
cb43d4e9e5 Implement missing CVT instructions. 2023-09-23 22:17:54 +01:00
Paul Holden
a6acd464a7 Implement full width mode. 2023-09-23 22:17:54 +01:00
Paul Holden
c0bb0d9e5f Fix DDIV and DDIVU.
These now pass https://github.com/PeterLemon/N64/tree/master/CPUTest/CPU/DDIV and https://github.com/PeterLemon/N64/tree/master/CPUTest/CPU/DDIVU.
2023-09-23 22:17:54 +01:00
Paul Holden
5c5e37cb61 Fix DIV and DIVU.
These now pass https://github.com/PeterLemon/N64/tree/master/CPUTest/CPU/DIV and https://github.com/PeterLemon/N64/tree/master/CPUTest/CPU/DIVU.
2023-09-23 22:17:54 +01:00
Paul Holden
6d645f7594 Fix DMULT and DMULTU.
Now passes https://github.com/PeterLemon/N64/tree/master/CPUTest/CPU/DMULTU.
2023-09-23 22:17:54 +01:00
Paul Holden
8cbb14dffe Ensure executeCop1 instruction is synced on boot. 2023-09-23 22:17:54 +01:00
Paul Holden
6e10f5063b Handle reads from 0xa5000508.
This gets F-Zero as far as the first splash screen. Still hangs though.
2023-09-23 22:17:54 +01:00
Paul Holden
79707a163c Handle memory access outside of rdram range. 2023-09-23 22:17:54 +01:00
Paul Holden
e758e613b6 PI fixes:
* Implement reg reads.
* Implement PI_STATUS_INTERRUPT.
* Handle weirdness with short (<128 byte) transfers.
* Update address registers after the transfer.
2023-09-23 22:17:54 +01:00
Paul Holden
7ca1745358 Improve error message - this isn't necessarily a read. 2023-09-23 22:17:54 +01:00
Paul Holden
31472da7ff Print values in checkCauseIP3Consistent. 2023-09-23 22:17:54 +01:00
Paul Holden
f4d6e6d25f Add basic SRAM support. 2023-09-23 22:17:54 +01:00
Paul Holden
4e4ec95a8b Template strings. 2023-09-23 22:17:54 +01:00
Paul Holden
48df4b9cf9 Init ucode_table for more microcodes. 2023-09-23 22:17:54 +01:00
Paul Holden
fbdfaf1dab Implement executeSetRDPOtherMode.
This allows Zelda OOT to render the intro logo.
2023-09-23 22:17:54 +01:00
Paul Holden
9decb39dcb Width>0x300 hack does seem to be needed.
Without this, Spiderman renders too small.
2023-09-23 22:17:54 +01:00
Paul Holden
83f36c98e2 Don't rendering anythign if the mode isn't set. 2023-09-23 22:17:54 +01:00
Paul Holden
4d4d48a48c Move computeDimensions to vi.js. 2023-09-23 22:17:54 +01:00
Paul Holden
b5dbc83eff Remove vi prefix. 2023-09-23 22:17:54 +01:00
Paul Holden
6a1fbe7891 Use accessors for registers. 2023-09-23 22:17:54 +01:00
Paul Holden
b9413d6768 Tidy VI register names. 2023-09-23 22:17:54 +01:00