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Author SHA1 Message Date
Paul Holden
30559ac442 Add generators for the remaining cop0 instructions. 2023-09-23 22:17:56 +01:00
Paul Holden
91a1ea1452 Inline special functions. 2023-09-23 22:17:56 +01:00
Paul Holden
a27503e23c genCalcAddressS32 and genCalcAddressU32 are unused. 2023-09-23 22:17:56 +01:00
Paul Holden
562344a212 Decode+execute for LL/SC instructions. 2023-09-23 22:17:56 +01:00
Paul Holden
05854dddf3 Dedupe code generation for CACHE. 2023-09-23 22:17:56 +01:00
Paul Holden
8cea3deba9 Decode+execute for store instructions. 2023-09-23 22:17:55 +01:00
Paul Holden
88c7b48e8b Decode+execute for load instructions. 2023-09-23 22:17:55 +01:00
Paul Holden
4d25a4d9db Decode+execute for SLTI/SLTIU/ANDI/ORI/XORI/LUI. 2023-09-23 22:17:55 +01:00
Paul Holden
085642de94 Decode+execute for ADDI + variants. 2023-09-23 22:17:55 +01:00
Paul Holden
ddf32cc068 Add generators for the remaining special instructions. 2023-09-23 22:17:55 +01:00
Paul Holden
02964fee6a Format. 2023-09-23 22:17:55 +01:00
Paul Holden
5c6d1d4b87 Split branch instructions into decode+execute. 
Can't dedupe the generate functions yet as they work slightly differently.
 2023-09-23 22:17:55 +01:00
Paul Holden
cdc5c08aca Convert MF/MTC0 and trap instructions into decode+execute parts. 2023-09-23 22:17:55 +01:00
Paul Holden
0f086bc182 Convert some arithmetic instructions into decode+execute parts. 2023-09-23 22:17:55 +01:00
Paul Holden
fc788b312a Convert some arithmetic instructions into decode+execute parts. 2023-09-23 22:17:55 +01:00
Paul Holden
ff04212ed9 Start to split instructions into separate functions to decode and execute. 
This makes it easier to reuse from the dynarec.
 2023-09-23 22:17:55 +01:00
Paul Holden
a6361f0396 Run JPG and VID tasks on the RSP. 2023-09-23 22:17:55 +01:00
Paul Holden
1e90beeaa0 Improve interaction of stuffToDo when running the RSP. 2023-09-23 22:17:55 +01:00
Paul Holden
31292413c2 Fix setCompare. 
When value < count just treat the result as an unsigned. Reset the counter even if zero is being written.
 2023-09-23 22:17:55 +01:00
Paul Holden
4a1782a0b6 Format 2023-09-23 22:17:55 +01:00
Paul Holden
6f91717d96 Don't redraw debugger content when it's hidden. 2023-09-23 22:17:55 +01:00
Paul Holden
aa92024727 Run the RSP in parallel to the CPU. 2023-09-23 22:17:55 +01:00
Paul Holden
c82ff8cc1d Remove logging about cache invalidation. 2023-09-23 22:17:55 +01:00
Paul Holden
f69a0619d1 Take a deep reference to the SPIBIST registers to access the program counter. 2023-09-23 22:17:55 +01:00
Paul Holden
eceed3bfc7 Use setControlU64 rather than moveToControl as the latter ignores writes to readonly registers. 2023-09-23 22:17:55 +01:00
Paul Holden
ec2ca02fdb Boundscheck reads and writes. 
These fail with DataView now (unlike UintXArray and friends).
 2023-09-23 22:17:55 +01:00
Paul Holden
9cd02f5a3a Raise AdEL or AdES exceptions for unaligned accesses. 2023-09-23 22:17:55 +01:00
Paul Holden
c3a7a6c2cf Use the tvType from rominfo rather than switching on the country code. 
This should fix some some coundtries missing from the PAL list.
 2023-09-23 22:17:55 +01:00
Paul Holden
492ea11e30 Format 2023-09-23 22:17:55 +01:00
Paul Holden
fe6540d9a9 Pick up changes from https://github.com/hulkholden/daedalus/blob/master/Source/Core/ROM.cpp. 2023-09-23 22:17:55 +01:00
Paul Holden
4f39f8be6c Tidy 2023-09-23 22:17:55 +01:00
Paul Holden
37c8f33e9e Fix boot for CIC x105. 
IPL3 for these roms decrypts some bytes left in IMEM and runs the code on the RSP.
 2023-09-23 22:17:55 +01:00
Paul Holden
6c4d141c6c Print whether it's the CPU or RSP executing an unknown op. 2023-09-23 22:17:55 +01:00
Paul Holden
7128987d37 Call reset() on all devices. 2023-09-23 22:17:55 +01:00
Paul Holden
50b3211292 BadVAddr should be sign extended. 2023-09-23 22:17:55 +01:00
Paul Holden
81a36a7b78 Halting through SP_SET_HALT shouldn't set BROKE. 2023-09-23 22:17:55 +01:00
Paul Holden
44d3bd5a12 Implement SP_SEMAPHORE_REG. 2023-09-23 22:17:55 +01:00
Paul Holden
5c69a3119c Both read and write length registers are set at the end of DMA transfer. 2023-09-23 22:17:55 +01:00
Paul Holden
f31e6c53bb Fix setOrClear - should return original bits if neither set nor clear specified. 2023-09-23 22:17:55 +01:00
Paul Holden
552d550fad Fix SP status flags. 
Specifying Set and Clear at the same time results in a no-op.
 2023-09-23 22:17:55 +01:00
Paul Holden
e2f4d1beb3 Don't run RSP if both SP_SET_HALT and SP_CLR_HALT are set. 2023-09-23 22:17:55 +01:00
Paul Holden
a9398ec417 Fully implement moveFromControl and moveToControl. 2023-09-23 22:17:55 +01:00
Paul Holden
e29a99fff5 Merge vectorRecip and vectorRecipSqrt. 2023-09-23 22:17:55 +01:00
Paul Holden
6c2f82ba44 Tidy reciprocal functions. 2023-09-23 22:17:55 +01:00
Paul Holden
b230aa4d96 Dedupe executeVRCPH and executeVRSQH. 2023-09-23 22:17:55 +01:00
Paul Holden
a77efb5fd2 Fix arg order for vectorSetAccFromReg. 2023-09-23 22:17:55 +01:00
Paul Holden
ea1e9ac903 Reorder functions. 2023-09-23 22:17:55 +01:00
Paul Holden
d87889e285 Add a vectorLogical helper. 2023-09-23 22:17:55 +01:00
Paul Holden
7bf199dc50 Init select in the loop initialiser. 2023-09-23 22:17:55 +01:00
Paul Holden
ca77ffd62b Use vectorSetAccFromReg helper. 2023-09-23 22:17:55 +01:00