1066 commits

Author	SHA1	Message	Date
Dillon Beliveau	b3d8b285c3	Rework IR storage to use a linked list and pointers instead of indices	2023-01-29 11:08:47 -08:00
Dillon Beliveau	87d51c5c47	remove unused	2023-01-28 16:01:29 -08:00
Dillon Beliveau	d343bb7370	shrink constants	2023-01-28 14:44:54 -08:00
Dillon Beliveau	392fa1379c	fix for values mapped to registers, add todo comment	2023-01-28 14:13:36 -08:00
Dillon Beliveau	6f3bacb310	constant propagation and dead code elimination	2023-01-28 13:31:07 -08:00
Dillon Beliveau	1613bd46aa	helpers for ir_emit_set_constant, documentation comments	2023-01-28 12:27:37 -08:00
Dillon Beliveau	b372cff267	abstract away common branch code	2023-01-28 12:15:29 -08:00
Dillon Beliveau	30b650ec19	don't print v%d= where it doesn't make sense	2023-01-28 12:07:20 -08:00
Dillon Beliveau	7a0f66431c	More IR instructions, handle branches	2023-01-28 11:58:35 -08:00
Dillon Beliveau	aa3b9e10d7	print IR as string	2023-01-22 17:15:12 -08:00
Dillon Beliveau	6a224a1639	don't load extra zero constants	2023-01-22 15:26:16 -08:00
Dillon Beliveau	9e2f050ee9	andi	2023-01-22 14:30:25 -08:00
Dillon Beliveau	e08943d3e9	loads, refactor out common code between load/store	2023-01-22 14:27:08 -08:00
Dillon Beliveau	4a17f2e2d4	implement a few more instructions	2023-01-22 14:10:26 -08:00
Dillon Beliveau	850c93e292	missed a file	2023-01-16 15:34:08 -08:00
Dillon Beliveau	3e861d123f	emit IR for LUI	2023-01-16 15:10:27 -08:00
Dillon Beliveau	3a1d5e952f	framework out the IR emitter	2023-01-16 12:37:29 -08:00
Dillon Beliveau	c70b2feaed	remove logging and crash	2023-01-14 16:00:04 -08:00
Dillon Beliveau	ae58d464f0	handle determining which instructions should be compiled into a block	2023-01-14 14:29:48 -08:00
Dillon Beliveau	1b66e11e43	refactor jit components I plan on rewriting to a new module	2023-01-07 14:40:33 -08:00
Dillon Beliveau	bd4ff4a3c2	fix DIV and DDIV	2022-10-16 09:58:34 -07:00
Dillon Beliveau	6cdc45c460	Support capstone dependency on windows	2022-10-09 18:23:09 -07:00
Dillon Beliveau	4e2ddfa564	better self-modifying code detection: mark what addresses are code, and only invalidate a dynarec page if one of those is rewritten.	2022-09-11 19:16:04 -07:00
Dillon Beliveau	2f1217418f	Emulate invalid coprocessor instructions	2022-09-10 15:16:33 -07:00
Dillon Beliveau	37803b4de5	Settings support	2022-08-20 15:45:44 -07:00
Dillon Beliveau	960e9627cd	fix rsq	2022-08-14 18:05:16 -07:00
Dillon Beliveau	aa1b560f16	cleanup in vrsql	2022-08-14 17:30:51 -07:00
Dillon Beliveau	7a0daf47e0	cleanup in vrcph/vrsqh	2022-08-14 17:30:35 -07:00
Dillon Beliveau	b42981a08b	fix vrcpl	2022-08-14 17:30:11 -07:00
Dillon Beliveau	2e7605f5e6	vrndp	2022-08-14 17:29:34 -07:00
Dillon Beliveau	c996f4ee0f	vrndn	2022-08-14 17:29:00 -07:00
Dillon Beliveau	3bbc26144c	vmulq	2022-08-14 17:28:42 -07:00
Dillon Beliveau	702574e322	vmacq	2022-08-14 17:28:36 -07:00
Dillon Beliveau	e764af1b8c	Fix VCL	2022-08-14 16:12:24 -07:00
Dillon Beliveau	87e5ce12ac	Implement all remaining undocumented RSP instructions	2022-08-14 13:54:31 -07:00
Dillon Beliveau	419bcdbb45	Implement SWV	2022-08-14 13:53:28 -07:00
Dillon Beliveau	c58f70b3c4	Fix SFV	2022-08-14 13:50:43 -07:00
Dillon Beliveau	e0dfc64119	Fix LFV	2022-08-14 13:50:09 -07:00
Dillon Beliveau	66d943e6cb	DPC interface fixes	2022-08-13 16:48:08 -07:00
Dillon Beliveau	d184004ea2	fix typo in variable name	2022-08-13 15:02:58 -07:00
Dillon Beliveau	c5811102ae	Fix RSP CP0	2022-08-13 15:02:36 -07:00
Dillon Beliveau	29564b540e	fix SP DMAs	2022-08-13 14:15:06 -07:00
Dillon Beliveau	316c023897	correct PIF RAM SH edge cases	2022-08-13 11:42:42 -07:00
Dillon Beliveau	050f278487	correct latching for byte writes to cartridge	2022-08-13 11:15:40 -07:00
Dillon Beliveau	9d48d5036c	Correctly invalidate dynarec pages in PI DMA	2022-08-10 21:14:56 -07:00
Dillon Beliveau	48919dd75e	Remove a branch in the RSP dynarec	2022-07-31 16:06:19 -07:00
Dillon Beliveau	fa21e26c18	RSP DMA tweaks	2022-07-31 15:47:51 -07:00
Dillon Beliveau	05f65ce250	Use faster ring buffer implementation	2022-07-24 17:44:07 -07:00
Dillon Beliveau	af16ad1712	Replace dword with u64	2022-07-23 17:18:30 -07:00
Dillon Beliveau	71d9365bed	Update integer type names	2022-07-13 19:24:09 -07:00