Commit graph

978 commits

Author SHA1 Message Date
Dillon Beliveau
5191c6a99a ease off on scaling 2021-01-07 20:17:15 -05:00
Dillon Beliveau
571b75154c super mario 64 has 4k EEPROM 2021-01-07 20:17:08 -05:00
Dillon Beliveau
ca997038d4 write to sram from cart_2_1 as well 2021-01-07 20:16:57 -05:00
Dillon Beliveau
67bcef5057 direct SRAM to save data, add OoT to the game db 2021-01-07 19:29:04 -05:00
Dillon Beliveau
c69bba3438 mempack handled separately from other save types 2021-01-07 18:56:37 -05:00
Dillon Beliveau
df82824df0 don't bswap initial PC twice 2021-01-07 17:41:27 -05:00
Dillon Beliveau
b96a5391a6 Merge branch 'master' of github.com:Dillonb/n64 2021-01-05 01:21:49 -05:00
Dillon Beliveau
e19d989fb1 add mk64 to game db 2021-01-05 01:21:43 -05:00
Dillon Beliveau
9feefb73e7 add to game db, asserts for mempack accesses when not initialized 2021-01-05 00:33:55 -05:00
Dillon Beliveau
f028e49e9c controller mempak working 2021-01-05 00:32:54 -05:00
Dillon Beliveau
902649609d simple game DB 2021-01-04 21:49:35 -05:00
Dillon Beliveau
fb1b99e045 Use groundwork theme for RTD 2021-01-04 19:54:42 -05:00
Dillon Beliveau
e9a6da04f9 mempack reads/writes use save_data buffer 2021-01-04 00:50:50 -05:00
Dillon Beliveau
8dc4978364 create empty files for save data 2021-01-04 00:29:43 -05:00
Dillon Beliveau
faa4c05f51 stub mempack writes 2021-01-04 00:06:03 -05:00
Dillon Beliveau
6d9a67daa5 stubbing mempack reads 2021-01-03 23:35:30 -05:00
Dillon Beliveau
d316d74b77 fix VABS 2021-01-03 23:02:56 -05:00
Dillon Beliveau
042f8253bc better names 2021-01-03 22:44:57 -05:00
Dillon Beliveau
fa2bf265e2 swap random_vs to true for more instructions 2021-01-03 22:11:52 -05:00
Dillon Beliveau
6f36915208 fix vrsql 2021-01-03 22:11:10 -05:00
Dillon Beliveau
1442c424f3 these appear to work fine 2021-01-03 22:02:09 -05:00
Dillon Beliveau
01b5494f74 copy in previous res correctly 2021-01-03 21:59:12 -05:00
Dillon Beliveau
cb5bce814b vmov actually works fine 2021-01-03 21:49:07 -05:00
Dillon Beliveau
b0bf59e753 use random vs if instruction is marked as using it 2021-01-03 21:35:33 -05:00
Dillon Beliveau
b5d504bc2c field for if tests should have a random vs 2021-01-03 20:45:08 -05:00
Dillon Beliveau
b86eb37f59 display more information in rsp fuzzer 2021-01-03 20:36:16 -05:00
Dillon Beliveau
113ebb7114 cleanup VMOV 2021-01-03 20:34:53 -05:00
Dillon Beliveau
ec6fbecdb7 print out emu versions of res & accumulator 2021-01-03 19:46:13 -05:00
Dillon Beliveau
bf589dffe7 turn off LTO 2021-01-03 17:55:57 -05:00
Dillon Beliveau
613cbddb8a quiet down rsp fuzzer output 2021-01-03 17:55:04 -05:00
Dillon Beliveau
9046e0bc9e RSP fuzzer configurable number of fuzzes per instruction, init state from hardware, comment out broken instructions 2021-01-03 17:19:34 -05:00
Dillon Beliveau
41964fef04 vnop is just a nop 2021-01-03 16:44:09 -05:00
Dillon Beliveau
0c1260c874 vnor works with non-zero element 2021-01-03 16:29:45 -05:00
Dillon Beliveau
5412ffb89a vnand works with non-zero element 2021-01-03 16:24:45 -05:00
Dillon Beliveau
0e2030f039 comment out unimplemented instructions, remove unused function 2021-01-02 10:45:10 -05:00
Dillon Beliveau
c15003713a link against core 2021-01-02 10:26:50 -05:00
Dillon Beliveau
eef74b6e47 automatically test each instruction 1000 times 2021-01-02 10:26:07 -05:00
Dillon Beliveau
c7e87bb865 send instruction to test over the wire 2021-01-02 09:28:10 -05:00
Dillon Beliveau
b57138d22f fix VRSQ side effect 2020-12-31 17:57:28 -05:00
Dillon Beliveau
a99e2bcb70 colors in flag reg output 2020-12-31 16:54:28 -05:00
Dillon Beliveau
c61aa4a9cf compare flag regs 2020-12-31 16:47:02 -05:00
Dillon Beliveau
b9888e7a8f run infinite random tests from RSP fuzzer 2020-12-31 16:23:51 -05:00
Dillon Beliveau
4792e259e4 receive and verify flag registers 2020-12-31 16:13:05 -05:00
Dillon Beliveau
84425e17af RSP fuzzer compares accumulator as well 2020-12-31 14:34:52 -05:00
Dillon Beliveau
048df5ccbf first pass at an RSP fuzzer 2020-12-30 23:02:55 -05:00
Dillon Beliveau
b6c08bbe44 turn on LTO 2020-12-29 17:00:41 -05:00
Dillon Beliveau
17dc2b1f6e quiet! 2020-12-29 17:00:35 -05:00
Dillon Beliveau
0a11e8057f remove stray dep on dma.c/h 2020-12-29 14:54:43 -05:00
Dillon Beliveau
b8ade649cd fix PI_DRAM_ADDR alignment 2020-12-29 14:51:39 -05:00
Dillon Beliveau
185160c1fd get rid of dma.c/h 2020-12-29 14:37:28 -05:00