2014-04-18 11:24:43 -04:00
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//
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// si/controller.h: Serial interface controller.
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//
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2015-07-01 19:44:21 -04:00
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// CEN64: Cycle-Accurate Nintendo 64 Emulator.
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// Copyright (C) 2015, Tyler J. Stachecki.
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2014-04-18 11:24:43 -04:00
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//
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// This file is subject to the terms and conditions defined in
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// 'LICENSE', which is part of this source code package.
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//
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#ifndef __si_controller_h__
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#define __si_controller_h__
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#include "common.h"
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2021-07-12 09:29:05 -04:00
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#include "local_time.h"
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2016-01-24 15:26:35 -05:00
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#include "si/pak.h"
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2016-08-31 21:31:02 -04:00
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#include "dd/controller.h"
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2014-04-18 11:24:43 -04:00
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enum si_register {
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#define X(reg) reg,
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#include "si/registers.md"
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#undef X
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NUM_SI_REGISTERS
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};
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2014-04-18 12:44:57 -04:00
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#ifdef DEBUG_MMIO_REGISTER_ACCESS
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extern const char *si_register_mnemonics[NUM_SI_REGISTERS];
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#endif
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2016-01-23 05:26:07 -05:00
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struct eeprom {
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2016-01-23 18:59:11 -05:00
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uint8_t *data;
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2016-01-23 05:26:07 -05:00
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size_t size;
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};
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2021-07-12 09:29:05 -04:00
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struct rtc {
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uint16_t control;
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struct time_stamp now;
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int32_t offset_seconds;
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};
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2014-04-18 11:24:43 -04:00
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struct si_controller {
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struct bus_controller *bus;
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const uint8_t *rom;
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2014-07-13 21:07:24 -04:00
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uint8_t command[64];
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2014-04-18 14:15:18 -04:00
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uint8_t ram[64];
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2014-04-18 11:24:43 -04:00
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uint32_t regs[NUM_SI_REGISTERS];
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2014-04-18 14:15:18 -04:00
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uint32_t pif_status;
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2014-08-27 23:10:10 -04:00
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uint8_t input[4];
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2016-01-23 05:26:07 -05:00
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struct eeprom eeprom;
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2021-07-12 09:29:05 -04:00
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struct rtc rtc;
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2016-01-24 15:26:35 -05:00
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struct controller controller[4];
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2014-04-18 11:24:43 -04:00
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};
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2015-01-01 14:22:43 -05:00
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cen64_cold int si_init(struct si_controller *si, struct bus_controller *bus,
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2016-08-31 21:31:02 -04:00
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const uint8_t *pif_rom, const uint8_t *cart_rom,
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const struct dd_variant *dd_variant,
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2016-06-16 22:30:43 -04:00
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uint8_t *eeprom, size_t eeprom_size,
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2016-01-24 15:26:35 -05:00
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const struct controller *controller);
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2014-04-18 11:24:43 -04:00
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2016-01-27 02:31:50 -05:00
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int read_pif_rom_and_ram(void *opaque, uint32_t address, uint32_t *word);
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int write_pif_rom_and_ram(void *opaque, uint32_t address, uint32_t word, uint32_t dqm);
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2014-04-18 11:24:43 -04:00
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int read_si_regs(void *opaque, uint32_t address, uint32_t *word);
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2014-04-18 13:34:23 -04:00
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int write_si_regs(void *opaque, uint32_t address, uint32_t word, uint32_t dqm);
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2014-04-18 11:24:43 -04:00
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#endif
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