switch-coreboot/mainboard
Mart Raudsepp cc9707120e Start of Artec Group ThinCan DBE63 support.
* Copying of files from other mainboards as a starting point:
amd/db800/Makefile
artecgroup/dbe62/cmos.layout
artecgroup/dbe62/dts
amd/db800/initram.c
artecgroup/dbe61/irq_tables.h
artecgroup/dbe62/stage1

* Kconfig integration. Behind CONFIG_EXPERIMENTAL for now, as the board is not in the market yet.

Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>

git-svn-id: svn://coreboot.org/repository/coreboot-v3@1119 f3766cd6-281f-0410-b1cd-43a5c92072e9
2009-01-23 10:53:49 +00:00
..
adl cs5536: Remove redundant enable_ide variable from ide device. 2009-01-09 18:12:08 +00:00
amd cs5536: Remove redundant enable_ide variable from ide device. 2009-01-09 18:12:08 +00:00
amp cs5536: Remove redundant enable_ide variable from ide device. 2009-01-09 18:12:08 +00:00
artecgroup Start of Artec Group ThinCan DBE63 support. 2009-01-23 10:53:49 +00:00
emulation This patch should serve as a porting help for other northbridges for the new resource allocator. 2008-12-31 20:00:30 +00:00
gigabyte This is a small HT fixup until HT links get figured out better. 2009-01-08 16:22:39 +00:00
jetway This patch fixes a few small problems and gets cn700 to read from an IDE 2008-12-23 23:44:39 +00:00
kontron This patch fixes up kontron for the new resource allocator. More 2008-12-31 20:02:03 +00:00
pcengines cs5536: Remove redundant enable_ide variable from ide device. 2009-01-09 18:12:08 +00:00
via Kill off stage1_mtrr.c completely, and bring in mtrr.c for stage2 from v2. 2008-12-23 19:02:44 +00:00
Kconfig Make C7/CN700 boot to memtest86, and pass that test. Booting is very slow, ~15min to get to a memtest 2008-12-17 21:17:01 +00:00