mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
e1ef6d2dc8
Most importantly it fixes a simple programming error which made it so most of the sets on the USB were not doing anything. The bug is also in V2. With this fix, the DBE62 USB ports all work! If someone clones the fix to V2, it will also fix V2. Or, we can just convince you to move forward to V3 :-) Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://coreboot.org/repository/coreboot-v3@689 f3766cd6-281f-0410-b1cd-43a5c92072e9
98 lines
3.4 KiB
Text
98 lines
3.4 KiB
Text
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007 Ronald G. Minnich <rminnich@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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{
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device_operations = "cs5536_ops";
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/* Interrupt enables for LPC bus. Each bit is an IRQ 0-15. */
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lpc_serirq_enable = "0";
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/* LPC IRQ polarity. Each bit is an IRQ 0-15. */
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lpc_serirq_polarity = "0";
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/* 0:continuous 1:quiet */
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lpc_serirq_mode = "0";
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/* GPIO(0-0x20) for INT D:C:B:A, 0xFF=none. See virtual PIC spec. */
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enable_gpio_int_route = "0";
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/* 0:IDE 1:FLASH, if you are using NAND flash instead of IDE drive. */
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enable_ide_nand_flash = "0";
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/* Enable USB Port 4 (0:host 1:device).
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* This means that the board or whatever would be a "gadget", i.e.
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* you connect it to a computer and it looks like a storage or camera
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* or printer.
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*/
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enable_USBP4_device = "0";
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/* This is a tad confusing, but it's hard to make it easy.
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* These are the PPH bits (port power handling) in the
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* USB Option Capability register. They are 4 2-bit fields
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* that correspond to the four ports. This chip has two PWR ENABLE
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* pins, and what you can do is, for each of the four fields,
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* map which port controls which pin. It is common to map
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* ports 1&2 to PWR_EN_1, and ports 3&4 to PWR_EN_2.
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* The two bit fields are as follows:
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* 00 -- no power ever
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* 01 -- power control in EHCI will turn on both.
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* 10 -- power control will turn on EN1
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* 11 -- power control will turn on EN2
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* This is all very wiring dependent,
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* and there is a default hardware value (0xea),
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* meaning port 4 is EN2 and the rest are EN1.
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* So we let this default to 0, which to the driver means "do nothing",
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* but if the mainboard sets it, then it will be set into the UOCCAP.
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* for reference, DBE62 seems to want xx111010 -- xx because we
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* can get port 3 to work, but not port 4.
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*/
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pph = "0";
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/* 0:off, xxxx:overcurrent setting, e.g. 0x3FEA.
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* See CS5536 - Data Book (pages 380-381).
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* And don't just set this to "1". You have to set it
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* to values that make sense for the register. Do not set this
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* for your mainboard unless you have made sure of the register
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* settings!
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*/
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enable_USBP4_overcurrent = "0";
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/* COM1 settings */
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com1_enable = "0";
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com1_address = "0x3f8";
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com1_irq = "4";
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/* COM2 settings */
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com2_enable = "0";
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com2_address = "0x2f8";
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com2_irq = "3";
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/* enable/disable power button. On systems with no power switch,
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* one usually does not want the button enabled. Example:
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* Alix1C, dbe62, dbe61. If you enable this, and the power is
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* hard-wired, the board will turn off after 4 seconds, which is
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* probably not what you want.
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*/
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power_button = "0";
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/* Vpci devices to be disabled. Put device locations here, and always end the
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* array with a zero element. */
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unwanted_vpci = < 0 >;
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};
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