/* * This file is part of the coreboot project. * * Copyright (C) 2007 Ronald G. Minnich * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ { device_operations = "cs5536_ops"; /* Interrupt enables for LPC bus. Each bit is an IRQ 0-15. */ lpc_serirq_enable = "0"; /* LPC IRQ polarity. Each bit is an IRQ 0-15. */ lpc_serirq_polarity = "0"; /* 0:continuous 1:quiet */ lpc_serirq_mode = "0"; /* GPIO(0-0x20) for INT D:C:B:A, 0xFF=none. See virtual PIC spec. */ enable_gpio_int_route = "0"; /* 0:IDE 1:FLASH, if you are using NAND flash instead of IDE drive. */ enable_ide_nand_flash = "0"; /* Enable USB Port 4 (0:host 1:device). * This means that the board or whatever would be a "gadget", i.e. * you connect it to a computer and it looks like a storage or camera * or printer. */ enable_USBP4_device = "0"; /* This is a tad confusing, but it's hard to make it easy. * These are the PPH bits (port power handling) in the * USB Option Capability register. They are 4 2-bit fields * that correspond to the four ports. This chip has two PWR ENABLE * pins, and what you can do is, for each of the four fields, * map which port controls which pin. It is common to map * ports 1&2 to PWR_EN_1, and ports 3&4 to PWR_EN_2. * The two bit fields are as follows: * 00 -- no power ever * 01 -- power control in EHCI will turn on both. * 10 -- power control will turn on EN1 * 11 -- power control will turn on EN2 * This is all very wiring dependent, * and there is a default hardware value (0xea), * meaning port 4 is EN2 and the rest are EN1. * So we let this default to 0, which to the driver means "do nothing", * but if the mainboard sets it, then it will be set into the UOCCAP. * for reference, DBE62 seems to want xx111010 -- xx because we * can get port 3 to work, but not port 4. */ pph = "0"; /* 0:off, xxxx:overcurrent setting, e.g. 0x3FEA. * See CS5536 - Data Book (pages 380-381). * And don't just set this to "1". You have to set it * to values that make sense for the register. Do not set this * for your mainboard unless you have made sure of the register * settings! */ enable_USBP4_overcurrent = "0"; /* COM1 settings */ com1_enable = "0"; com1_address = "0x3f8"; com1_irq = "4"; /* COM2 settings */ com2_enable = "0"; com2_address = "0x2f8"; com2_irq = "3"; /* enable/disable power button. On systems with no power switch, * one usually does not want the button enabled. Example: * Alix1C, dbe62, dbe61. If you enable this, and the power is * hard-wired, the board will turn off after 4 seconds, which is * probably not what you want. */ power_button = "0"; /* Vpci devices to be disabled. Put device locations here, and always end the * array with a zero element. */ unwanted_vpci = < 0 >; };