arch_write_tables(), before a number of routines that write/reserve
stuff are executed (in my test this only affects the 0x0-0x500 region
but I notice there's other stuff too).
Attached patch moves it down, solving the problem. Because stage1 can no
longer assume the MBI is at 0xf0000, I had to add a return path for stage2
to give it a pointer, using its exit status value.
Signed-off-by: Robert Millan <rmh@aybabtu.com>
Acked-by: Jordan Crouse <jordan.crouse@amd.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@936 f3766cd6-281f-0410-b1cd-43a5c92072e9
EXPERT seemed like the best fit.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@921 f3766cd6-281f-0410-b1cd-43a5c92072e9
- Coding style and whitespace fixes.
- Remove obsolete comments, fix incorrect ones.
- Use the full/canonical name of mainboards/vendors everywhere.
- Update the list of USB Debug capable chipsets from
http://www.coreboot.org/EHCI_Debug_Port.
- s/LB/CB/ for the CONSOLE_PREFIX kconfig option.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@879 f3766cd6-281f-0410-b1cd-43a5c92072e9
r785 (move from explicit asm to implicit C) and unfortunately qemu never
triggered the bug, only real hardware did. That's because qemu will not
spew an error on access to RAM before RAM is enabled.
Thanks to Ron for bisecting this.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@857 f3766cd6-281f-0410-b1cd-43a5c92072e9
the other. It really matters for non-power-of-2 numbers.
This breaks k8 builds; fix is coming.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@852 f3766cd6-281f-0410-b1cd-43a5c92072e9
This code has been tested on dbe62, and builds for qemu as well.
the next step is testing on simnow.
k8.h: add more prototypes and some required inline functions.
cpu.h: same
serengeti: expand defines in mainboard.h, though we need a better
mechanism; continue to fix initram.c, add new support files to Makefile
lib/console.c: include globalvars.h
lib/lar.c: Provide more informative print as the lar is scanned.
k8 north: needed reset_test.c from v2, fixes to raminit.c
arch/x86
Kconfig: new CONFIG variable CBMEMK, meaning coreboot mem k, memory
used for coreboot.
init_cpus.c: functions to start up CPUs
stage1_mtrr.c: bring over early mtrr support from v2.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@847 f3766cd6-281f-0410-b1cd-43a5c92072e9
current compilation unit to be marked as externally_visible. We have
EXPORT_SYMBOL exactly for that purpose.
This applies to the following symbols used by x86emu and/or vm86:
- pci_read_config8
- pci_read_config16
- pci_read_config32
- pci_write_config8
- pci_write_config16
- pci_write_config32
- dev_find_pci_device
- dev_find_slot
It also applies to the main entry point of stage2:
- stage2
With this patch, I can use -fwhole-program for stage2 without any
problems. For standard compilation, this is a noop.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@827 f3766cd6-281f-0410-b1cd-43a5c92072e9
Geode still builds fine.
include/lib.h includes a new function, cycles(), which is a u64 and
architecture-defined. (Thanks, Plan 9, for a sensible idea).
All rdtsc removed in favor of cycles()
All other changes are k8 specific. None of these changes adversely
impact existing platforms AFAICT.
Goal is that by 31/8/8, we're testing on simnow.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@807 f3766cd6-281f-0410-b1cd-43a5c92072e9
existing code does not work due to the characteristics of stage1. This
has been broken since r729.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@786 f3766cd6-281f-0410-b1cd-43a5c92072e9
The individual makefiles in lib/ mainboard/ southbridge/ and superio/
have been changed accordingly and the big glue layer in
arch/x86Makefile has been modified to wrap the new rules correctly.
This pepares the way for additional optimizations during compile and
link time.
Build tested and boot tested on Qemu.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@782 f3766cd6-281f-0410-b1cd-43a5c92072e9
DECOMPRESSORS in arch/x86/Makefile. They absolutely do no belong there
because they're not arch specific.
lib/Makefile has a variable COMPRESSORS with identical content, but that
variable is completely unused. Move DECOMPRESSORS to lib/Makefile and
kill the unused one.
Build and boot tested on qemu.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@778 f3766cd6-281f-0410-b1cd-43a5c92072e9
printk buffer management to it.
Build tested and boot tested and result tested on Qemu.
Adding a new global variable is not as easy as it looks, but the
comments in the code should be good enough to tell you how.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@760 f3766cd6-281f-0410-b1cd-43a5c92072e9
This includes using consistent (C) lines, adding email addresses,
and so on. The file southbridge/nvidia/mcp55/dts was never edited
by Yinghai Lu (thus removing his (C) line) and would be too trivial
anyway...
The changes (though trivial) were also informally acked by Ron on IRC.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@744 f3766cd6-281f-0410-b1cd-43a5c92072e9
(1)we now compile in all printks, which is good: we can print any message provided we can change
the console log level at any time.
(2) The console log level is compiled in and unchangeable, which is bad, as it defeats the purpose of (1).
Add a BIOS_ALWAYS log level. Make console log level a variable. Make functions that set it and get it
visible everywhere. Always print out the version message; this is really *not* noise!
PCI: Simplify pci functions so that they can be used in stage1 or anywhere for that matter. Add
a find function which is needed for many stage1 functions. Note that we copy but also clean up
the libpayload stuff just a bit.
Get rid of config space type 2. If there was ever a platform that used it, I don't know what it was,
and the presence is a needless distraction.
tested and working on DBE62 (which means the console and the pci functions work :-).
There is a remaining problem with dumplxmsrs which nobody understands. It prints out garbage if we use the
%s for the msr names.
Formatting is an issue; if somebody wants to fix formatting they can assume I will ack it. Sorry,
my emacs has gone just nuts.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@729 f3766cd6-281f-0410-b1cd-43a5c92072e9
routine. That allows people to either adjust compression parameters
or scratchpad size.
Having a similar check during build time would be nice.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@684 f3766cd6-281f-0410-b1cd-43a5c92072e9
- Don't make write_phys/read_phys static, they can be useful elsewhere.
- Rename write_phys/read_phys to ram_write_phys/ram_read_phys for
consistency with the other RAM-related functions.
- Simplify some parts of the code a bit.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@635 f3766cd6-281f-0410-b1cd-43a5c92072e9
number during boot.
Convert process_file() to use enum compalgo instead of hardcoded
"1","2","3" and change the control structure from a series of if()
statements to a switch() statement.
Uppercasing enum compalgo also found a name clash between NONE as
compression algo and NONE as operation mode of util/lar.
Compile and boot tested on Qemu.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@606 f3766cd6-281f-0410-b1cd-43a5c92072e9
> Alix1c won't boot with the zero decompress code.
> I think the code is using the wrong address on decompress.
Indeed, r601 broke all targets, you were just lucky that qemu didn't
explode as well.
It's the seemingly easy patches which break booting. With your hint, I
found the bug. Myles made a small, but important mistake with the memset
for the "zeroes" decompression.
The memset zeroed the archive instead of the destination. No wonder it
did explode.
This patch fixes it and also reverts the emergency commit r604 because
that one is no longer necessary.
Ron tested on the Alix1c, boots fine, ethernet and IDE working.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@605 f3766cd6-281f-0410-b1cd-43a5c92072e9
for this is that currently, if you select no compression, the bss
segment of filo takes up 153K with just zeroes. With this patch, it
always takes up a lar header + 1 byte. I left the one byte so that
the checksum wouldn't be broken.
This patch could have taken out the calloc in the compression area,
but since it only uses compile-time memory, I decided to keep this
simple.
Myles
Signed-off-by: Myles Watson <myles@pel.cs.byu.edu>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@601 f3766cd6-281f-0410-b1cd-43a5c92072e9
CONFIG_* == 1. If those variables are set, they will always be 1.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@599 f3766cd6-281f-0410-b1cd-43a5c92072e9
Tested on Qemu and Geode LX.
Benefits of this patch:
- printk() now works directly after printk_buffer_init(), even before
the serial port is set up.
- If all you want is a log, you don't have to bother with serial output.
- A payload can read and analyze the log.
- You can build on this and buffer log until serial is available, then
flush the messages buffered so far.
The printk buffer is configurable with a default-on Kconfig variable.
If you want to dump the buffer from the Qemu monitor after CAR has been
disabled, use this command:
memsave 0x90000 65536 memdump.bin
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Marc Jones <marc.jones@amd.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@590 f3766cd6-281f-0410-b1cd-43a5c92072e9
- I left LB_TAG_ intact because they are used by the payloads
- file renames are still missing. see next commit
- some lb_ renames might be missing. feel free to provide patches.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@564 f3766cd6-281f-0410-b1cd-43a5c92072e9
is running the VSA in the geode lx northbridge.
It builds but is not tested.
lar.h: make LAR functions SHARED
lar.c: make process_file non-static (i.e. global)
vsmsetup.c: modify to use LAR functions.
stage1.c: new function, init_archive, which is SHARED and will set up
the initial archive struct.
Note that some work remains. The use of unsigned longs and unsigned
shorts should be changed to u32/u16 as Carl-Daniel has pointed out,
Because this change requires changes elsewhere I am not including them
in this patch.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@561 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@550 f3766cd6-281f-0410-b1cd-43a5c92072e9
numeric constants and #defines for such constants. Since grepping the
tree shouldn't be necessary to find a POST code and we already have
too many duplicated POST codes, gather almost all of them in a common
header file.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@549 f3766cd6-281f-0410-b1cd-43a5c92072e9
use it.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@544 f3766cd6-281f-0410-b1cd-43a5c92072e9
The message appears if a file has not been found in the LAR archive and
is triggered even by lookup routines. Normal capitalization helps
reducing the frightening effect of the message.
Correct a few typos in other areas of the LAR code as well.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@538 f3766cd6-281f-0410-b1cd-43a5c92072e9
into lib/northbridgelib.c.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@534 f3766cd6-281f-0410-b1cd-43a5c92072e9
lib/lar.c:load_file_segments() and greatly simplify arch/x86/stage1.c
code as a result. While I'm at it, improve the LAR segmentation
abstraction. Stage 1 code should not have to care about internal
representation of segments, that knowledge belongs into lib/lar.c.
Constification of most function parameters in lib/lar.c led to a few
other now obvious code removals.
Build tested and runtime tested in Qemu.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@530 f3766cd6-281f-0410-b1cd-43a5c92072e9
and create a valid LAR header with an entry value. This will fix the
problems Ron is having on the ALIX 1C and probably allow it to boot.
It also sets the text base of the .o to 0, instead of whatever wacky
value gld is choosing, so all platforms will have the same value.
Get away from worrying about potential gld bugs, now and in the future.
As added benefit, we obsolete a lot of code without introducing
new code.
Qemu target entry point debugging has been added to be able to spot
problems with entry points in the future.
This patch is a joint work of Ron and Carl-Daniel.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@523 f3766cd6-281f-0410-b1cd-43a5c92072e9
to have code in header files.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@518 f3766cd6-281f-0410-b1cd-43a5c92072e9
an artifact from the time when we needed stage2 phase 1 code to make
printk work.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@512 f3766cd6-281f-0410-b1cd-43a5c92072e9
dereference or worse) in case the archive length is exactly
sizeof(struct lar_header). Such an archive is invalid because the
filename directly after the LAR header is always dereferenced and has to
be at least 1 byte in the "empty filename" case (only terminating \0).
Improve LAR code documentation and reorder variables in one assignment
to make the code more obvious and readable. This will help people
understand what the code does when they look at it half a year from now.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@506 f3766cd6-281f-0410-b1cd-43a5c92072e9
differentiate between identically named objects during boot.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@501 f3766cd6-281f-0410-b1cd-43a5c92072e9
the common parts of copy_file() and run_file().
Signed-off-by: Alex Beregszaszi <alex@rtfs.hu>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@497 f3766cd6-281f-0410-b1cd-43a5c92072e9
