Commit graph

6 commits

Author SHA1 Message Date
Myles Watson
f59b4ca24a This patch removes the offset_pciio since there is never an offset_pciio an
offset_pciio and an offset_io.  This makes it easier to port things from v2.

It also updates mcp55 and some whitespace there.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@1099 f3766cd6-281f-0410-b1cd-43a5c92072e9
2009-01-05 23:04:13 +00:00
Ronald G. Minnich
2b83a9c158 The change to Kconfig is self-acked.
Add a depend clause so that we don't see these things on Geode. 
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
The other changes are:
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@753 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-13 02:44:46 +00:00
Ronald G. Minnich
243e969673 I am self-acking the change to Kconfig because it is trivial.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
The other changes are:

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

I am well aware that those defines are not a great idea. I need some 
good advice. I think we ought to have a stage1lib.c or something but 
I'll take suggestions. 

Thanks again


git-svn-id: svn://coreboot.org/repository/coreboot-v3@746 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-11 23:07:19 +00:00
Uwe Hermann
9eb8578b75 Minor cosmetic and/or license header fixes (trivial).
This includes using consistent (C) lines, adding email addresses,
and so on. The file southbridge/nvidia/mcp55/dts was never edited
by Yinghai Lu (thus removing his (C) line) and would be too trivial
anyway...

The changes (though trivial) were also informally acked by Ron on IRC.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>




git-svn-id: svn://coreboot.org/repository/coreboot-v3@744 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-11 21:01:54 +00:00
Ronald G. Minnich
da9286b479 State of the tree for K8
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@722 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-05 02:48:54 +00:00
Ronald G. Minnich
54b7a9609f With a bug fix from peter and a suggest change by Carl-Daniel
Resource map and a way to use the pci config stuff from stage 1, done in 
a way that will work in stage 2 (but only for systems that use type 1
config cycles; will fail for type MEM config cycles). 

We need to rethink the PCI config stuff per Stepan's comment, in part 
because the device tree now includes things that are NOT PCI devices. 
Stepan's suggestion, to make the functions take busdevfn as the 
parameter, makes a lot of sense. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.s


git-svn-id: svn://coreboot.org/repository/coreboot-v3@720 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-05 01:19:37 +00:00