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Docs: New TODO moved to EMU, old renamed to old_todo Docs: Old coding style is deprecated (old_style.txt) Docs: Removed mention about CubeDocumented and fixed old emails RE: boot.s, proved first asm line (lis instruction parameter) RE: Added PAL and NTSC Boot and IPL IDA files RE: Some work on NTSC IPL (identified many lib calls, including OS, GX) RE: Added EXI Bootrom descrambler by segher RE: GXInit RE: Internal GX lib structures (GXPrivate.h) RE: More details on lomem (OS versions) RE: OSInit and OS.c RE: OSAlloc (heap allocator) RE: Very first code of Metrowerk runtime (__start.c) Docs: Added copy of http://gcdev.narod.ru Source\Utils: Command processor (Cmd.c) Source\Utils: File wrapper Source\Utils: Gekko disasm cleaned up and ported to plain C Source\Utils: Double-linked lists Source\Utils: Ported old Profiler code Source\Utils: String utils
79 lines
2.3 KiB
Text
79 lines
2.3 KiB
Text
0xCC004000 - MI (memory protection interface).
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-------------------------------------------------------------------------------
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Overview
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---------
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Protection can be enabled only for pages (page size is 1024 bytes), as example:
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addr = 0x80EFEFEF, page = 0x3BFB, or
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100000 0011101111111011 1111101111
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-- this is page number
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Supported types of protection :
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0 - access denied
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1 - read only
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2 - write only
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3 - read / write (no protection, full access)
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You can specify only 4 protected regions of memory. External interrupt will be
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signaled, if CPU try to access protected region. Because of its allowed
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to enable protection only for 4 regions, there are total 4 possible interrupts.
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They are called : MEM_0, MEM_1, MEM_2 and MEM_3.
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Hardware registers
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-------------------
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0xCC004000...0xCC00400F - keeping ranges for 4 protected regions :
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// 0xCC004000 (N like to call the regions as "channels")
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struct
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{
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u16 pageLo, pageHi;
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} MEM_CHAN[4];
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0xCC004010 - keeping protection type for each of 4 chans. each 2 bits containing
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type of the protection (see above).
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------------------------
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| bits | 0 1 2 3 4 5 6 7 | (big-endian)
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|------|-----------------|
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| chan | [3] [2] [1] [0] |
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------------------------
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0xCC00401C MI interrupt mask :
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------------------------
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| bits | 0 1 2 3 4 5 6 7 | (big-endian)
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|------|-----------------|
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| desc | M 3 2 1 0 |
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------------------------
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0 - mask MEM0 interrupt (1 - enable)
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1 - mask MEM1 interrupt
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2 - mask MEM2 interrupt
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3 - mask MEM3 interrupt
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M - mask all MI interrupts
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1 - enable, 0 - disable. other bits unused.
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0xCC00401E interrupt cause. bit layout same as interrupt mask.
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0xCC004020 assume to be zero, after init, and should be cleared by
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interrupt handler.
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0xCC004022 theese are used inside interrupt handler. seems to contain
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0xCC004024 address, which failed protection rules. need to check on real GC
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0xCC004028 2 after init, if RAM size is exactly 24MB.
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(all registers are 16-bit only)
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-------------------------------------------------------------------------------
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org -- ogamespec@gmail.com
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