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https://github.com/emu-russia/pureikyubu.git
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87 lines
4.1 KiB
C
87 lines
4.1 KiB
C
// Flipper Processor Interface (for Gekko)
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// TODO: While exploring the Flipper architecture, I misunderstood the purpose of the PI and MEM (MI) components.
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// In fact, PI is used to access Flipper's memory and registers from the Gekko side. MEM is used by various Flipper subsystems to access main memory (1T-SRAM).
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// Now all memory access handlers are in the MI.cpp module, but in theory they should be in PI.cpp. Let's leave it as it is for now.
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#pragma once
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// Address spaces
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#define PI_MEMSPACE_MAINMEM 0x0000'0000 // 1T-SRAM main memory
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#define PI_MEMSPACE_EFB 0x0800'0000 // GX eFB base address
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#define PI_REGSPACE_CP 0x0C00'0000
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#define PI_REGSPACE_PE 0x0C00'1000 // GX Pixel Engine regs mapped to physical memory
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#define PI_REGSPACE_VI 0x0C00'2000
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#define PI_REGSPACE_PI 0x0C00'3000
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#define PI_REGSPACE_MEM 0x0C00'4000
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#define PI_REGSPACE_DSP 0x0C00'5000
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#define PI_REGSPACE_DI 0x0C00'6000
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#define PI_REGSPACE_SI 0x0C00'6400
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#define PI_REGSPACE_EXI 0x0C00'6800
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#define PI_REGSPACE_AIS 0x0C00'6C00
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#define PI_REGSPACE_GX_FIFO 0x0C00'8000 // GX streaming fifo
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#define PI_MEMSPACE_BOOTROM 0xFFF0'0000
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#define PI_REG8_TO_SPACE(space, id) (space | ((uint32_t)(id)))
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#define PI_REG16_TO_SPACE(space, id) (space | ((uint32_t)(id) << 1))
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#define PI_REG32_TO_SPACE(space, id) (space | ((uint32_t)(id) << 2))
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// Efb Z-plane select
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#define PI_EFB_ZPLANE 0x0040'0000
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// Mask EFB address
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#define PI_EFB_ADDRESS_MASK 0xFF80'0000
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#define PI_INTSR 0x0C003000 // master interrupt reg
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#define PI_INTMR 0x0C003004 // master interrupt mask
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#define PI_BASE 0x0C00300C // PI CP fifo base
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#define PI_TOP 0x0C003010 // PI CP fifo top
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#define PI_WRPTR 0x0C003014 // PI CP fifo write pointer
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#define PI_CPABT 0x0C003018 // Abort PI CP FIFO?
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#define PI_PIESR 0x0C00301C
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#define PI_PIEAR 0x0C003020
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#define PI_CONFIG 0x0C003024 // PI CFG + reset bits
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#define PI_DURAR 0x0C003028
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#define PI_CHIPID 0x0C00302C // Flipper ID (console revision)
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#define PI_STRGTH 0x0C003030
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#define PI_CPUDBB 0x0C003034
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// PI interrupt regs mask
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#define PI_INTERRUPT_HSP 0x2000 // high-speed port
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#define PI_INTERRUPT_DEBUG 0x1000 // debug hardware
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#define PI_INTERRUPT_CP 0x0800 // command fifo
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#define PI_INTERRUPT_PE_FINISH 0x0400 // PE finish command (draw done)
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#define PI_INTERRUPT_PE_TOKEN 0x0200 // PE token parsed (draw sync)
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#define PI_INTERRUPT_VI 0x0100 // 4 VI line ints
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#define PI_INTERRUPT_MEM 0x0080 // memory protection failed
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#define PI_INTERRUPT_DSP 0x0040 // various DSP (ARAM, AI FIFO, DSP)
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#define PI_INTERRUPT_AI 0x0020 // DVD streaming trigger interrupt
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#define PI_INTERRUPT_EXI 0x0010 // EXI transfer complete
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#define PI_INTERRUPT_SI 0x0008 // serial interrupts
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#define PI_INTERRUPT_DI 0x0004 // DVD cover, break, transfer complete
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#define PI_INTERRUPT_RSW 0x0002 // reset "switch"
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#define PI_INTERRUPT_PI 0x0001 // Generated when something goes wrong inside Flipper
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// PI CONFIG Reset control bits
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#define PI_CONFIG_SYSRSTB 0x00000001
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#define PI_CONFIG_MEMRSTB 0x00000002
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#define PI_CONFIG_DIRSTB 0x00000004
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// ---------------------------------------------------------------------------
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// hardware API
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// PI state (registers and other data)
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struct PIControl
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{
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volatile uint32_t intsr; // interrupt cause
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volatile uint32_t intmr; // interrupt mask
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bool rswhack; // reset "switch" hack
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bool log; // log interrupts
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uint32_t consoleVer; // console version
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};
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extern PIControl pi;
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void PIAssertInt(uint32_t mask); // set interrupt(s)
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void PIClearInt(uint32_t mask); // clear interrupt(s)
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void PIOpen(HWConfig * config);
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