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https://github.com/emu-russia/pureikyubu.git
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66 lines
1.4 KiB
C++
66 lines
1.4 KiB
C++
// Handling access to the PE registers available to the CPU and EFB
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#include "pch.h"
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using namespace Debug;
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namespace GX
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{
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uint16_t GXCore::PeReadReg(PEMappedRegister id)
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{
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switch (id)
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{
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case PEMappedRegister::PE_SR_ID:
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return state.peregs.sr;
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case PEMappedRegister::PE_TOKEN_ID:
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return state.peregs.token;
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default:
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return 0;
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}
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}
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void GXCore::PeWriteReg(PEMappedRegister id, uint16_t value)
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{
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switch (id)
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{
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case PEMappedRegister::PE_SR_ID:
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// clear interrupts
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if (state.peregs.sr & PE_SR_DONE)
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{
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state.peregs.sr &= ~PE_SR_DONE;
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PIClearInt(PI_INTERRUPT_PE_FINISH);
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}
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if (state.peregs.sr & PE_SR_TOKEN)
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{
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state.peregs.sr &= ~PE_SR_TOKEN;
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PIClearInt(PI_INTERRUPT_PE_TOKEN);
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}
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// set mask bits
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if (value & PE_SR_DONEMSK) state.peregs.sr |= PE_SR_DONEMSK;
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else state.peregs.sr &= ~PE_SR_DONEMSK;
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if (value & PE_SR_TOKENMSK) state.peregs.sr |= PE_SR_TOKENMSK;
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else state.peregs.sr &= ~PE_SR_TOKENMSK;
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break;
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}
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}
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// Currently, Cpu2Efb emulation is not supported. It is planned to be forwarded to the graphic Backend.
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uint32_t GXCore::EfbPeek(uint32_t addr)
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{
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Report(Channel::GP, "EfbPeek, address: 0x%08X\n", addr);
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return 0;
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}
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void GXCore::EfbPoke(uint32_t addr, uint32_t value)
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{
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Report(Channel::GP, "EfbPoke, address: 0x%08X, value: 0x%08X\n", addr, value);
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}
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}
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