pureikyubu/Docs/HW/ais.htm
ogamespec c21147ccff Cumulative changes all around project, regarding Stage 1
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<center><u><h2>Audio Streaming Interface</h2></u></center>
<BR><BR>AICR: Audio Interface Control Register <BR><BR>Mnemonic: AICR
<BR><BR>Offset: 0x00 <BR><BR>Size 32 bits <PRE> AICR
Bits Mnemonic Type Reset Description
31:6 R 0 .times. 0 Reserved
5 SCRESET RW 0 .times. 0 Sample Counter Reset: When a `1` is
written to this
bit the AISLRCNT register is rest to 0
.times. 0O.
Read:
always 0
Write:
0 = No effect
1 = Reset AISLRCNT register
4 AIINTVLD RW 0 .times. 0 Audio Interface Interrupt Valid.
This bit controls
whether AIINT is affected by the AIIT
register
matching AISLRCNT. Once set, AIINT will
hold its
last value.
0 = March affects AIINT.
1 = AIINT hold last value.
3 AIINT RW 0 .times. 0 Audio Interface Interrupt Status
and clear. On read
this bit indicates the current status of
the audio
interface interrupt. When a `1` is
written to this
register, the interrupt is cleared. This
interrupt
indicates that the AIIT register matches
the
AISLRCNT. This bit asserts regardless of
the setting
of AICR[AIMSK].
Write:
0 = No effect
1 = Clear Audio Interface interrupt
Read:
0 = Audio Interface Interrupt has not
been
requested
1 = Audio Interface Interrupt has been
requested.
2 AIINTMSK RW 0 .times. 0 Audio interface Interrupt Mask:
0 = interrupt masked
1 = Interrupt enabled
1 AFR RW 0 .times. 0 Auxiliary Frequency Register:
Controls the sample
rate of the streaming audio data. When
set to 32 kHz
sample rate, the SRC will convert the
streaming
audio data to 48 kHz. This bit should
only be
changed when Streaming Audio is stopped
(AICR[PSTAT] set to 0).
0 = 32 kHz sample rate
1 = 48 kHz sample rate
0 PSTAT RW 0 .times. 0 Playing Status: This bit enables
the AISLR clock
which controls the playing/stopping of
audio
streaming. When this bit is AISLRCNT
register will
increment for every stereo pair of
samples output.
0 = Stop or Pause streaming audio (AISLR
clock
disabled)
1 = Play streaming audio (AISLR clock
enabled)
</PRE><BR><BR>AIVR: Audio Interface Volume Register <BR><BR>Mnemonic: AIVR
<BR><BR>Offset: 0x04 <BR><BR>Size 32 bits <PRE> AIVR
Bits Mnemonic Type Reset Description
31:16 R 0x0 Reserved
15:8 AVRR RW 0x0 Auxiliary Volume Register: Controls
the volume of the auxiliary sound (right
channel) 0xFF is maximum volume,
0x00 is muted.
7:0 AVRL RW 0x0 Auxiliary Volume Register: Controls
the volume of the auxiliary sound (left
channel) 0xFF is maximum volume,
0x00 is muted.
</PRE><BR><BR>AISCNT: Audio Interface Sample Counter <BR><BR>Mnemonic: AISCNT
<BR><BR>Offset: 0x08 <BR><BR>Size 32 bits <PRE> AISCNT
Bits Mnemonic Type Reset Description
31:0 AISCNT R 0x0 Audio interface Sample Counter: This
register counts the number of AIS stereo
samples that have been output. It is
enabled by AICR[PSTAT]. It can be
cleared by the AICR[SCRESET]
register.
</PRE><BR><BR>AIIT: Audio Interface Interrupt Timing <BR><BR>Mnemonic: AIIT
<BR><BR>Offset: 0x0C <BR><BR>Size 32 bits <PRE> AIIT
Bits Mnemonic Type Reset Description
31:0 AIIT R 0x0 Audio Interface Interrupt Timing: This
register indicates the stereo sample
count to issue an audio interface inter-
rupt to the main processor. The interrupt
is issued when the value of the
AISLRCNT register matches the con-
tent of this register.
<hr>
<br><i>
Cut from USPTO #6609977<br>
<a href="mailto:ogamespec@gmail.com">org - ogamespec@gmail.com</a></i>
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