Henrik Rydgård 4d3ec20082 ByteSwap.h results in a file name collision on some systems with byteswap.h. Fix this by merging it into BitSet.h.		2020-09-30 00:09:13 +02:00
..
IRAsm.cpp	Remove most instances of base/logging.h from Common, Core, GPU, more	2020-08-15 19:08:44 +02:00
IRCompALU.cpp	Jit: Respect flags for jit types and features.	2019-02-03 14:57:08 -08:00
IRCompBranch.cpp	Remove category from _assert_msg_ functions. We don't filter these by category anyway.	2020-07-19 20:33:25 +02:00
IRCompFPU.cpp	Jit: Respect flags for jit types and features.	2019-02-03 14:57:08 -08:00
IRCompLoadStore.cpp	Jit: Respect flags for jit types and features.	2019-02-03 14:57:08 -08:00
IRCompVFPU.cpp	Compat: Option to use accurate dotprod for VMMUL.	2019-08-05 11:44:52 -07:00
IRFrontend.cpp	Remove most instances of base/logging.h from Common, Core, GPU, more	2020-08-15 19:08:44 +02:00
IRFrontend.h	Minor cleanup	2018-01-10 09:19:27 +01:00
IRInst.cpp	IR Interpreter: Add some missing instruction metadata. May help part of #10897	2018-04-11 11:16:41 +02:00
IRInst.h	Core: Add flags to disable jit features.	2019-02-03 13:58:24 -08:00
IRInterpreter.cpp	Centralize handling of memory exceptions a bit	2020-07-12 15:25:20 +02:00
IRInterpreter.h	irjit: Embed constant inside IRInst.	2018-01-03 23:24:04 -08:00
IRJit.cpp	irjit: Switch to XXH3.	2020-08-27 20:40:55 -07:00
IRJit.h	ARM/ARM64 instruction analysis, hook up to handler	2020-07-14 09:25:45 +02:00
IRPassSimplify.cpp	ByteSwap.h results in a file name collision on some systems with byteswap.h. Fix this by merging it into BitSet.h.	2020-09-30 00:09:13 +02:00
IRPassSimplify.h	irjit: Combine lwl/lwr and swl/swr, like before.	2018-01-07 21:05:58 -08:00
IRRegCache.cpp	jit-ir: Less instructions cause flushing in constant propagation.	2016-05-08 23:25:08 +02:00
IRRegCache.h	jit-ir: Less instructions cause flushing in constant propagation.	2016-05-08 23:25:08 +02:00