mirror of
https://github.com/hrydgard/ppsspp.git
synced 2025-04-02 11:01:50 -04:00
a5be0976bd
Opens up for having multiple JIT implementations available at runtime, which could be use for experimenting with new JIT compiler types or for unit testing one JIT on another architecture. Very few of the newly virtual calls are on any sort of critical path so hopefully there will not be a performance loss.
328 lines
11 KiB
C++
328 lines
11 KiB
C++
// Copyright (c) 2012- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#pragma once
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#include "Common/CommonTypes.h"
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#include "Common/Thunk.h"
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#include "Common/x64Emitter.h"
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#if defined(ARM)
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#error DO NOT BUILD X86 JIT ON ARM
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#endif
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#include "Common/x64Emitter.h"
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#include "Core/MIPS/JitCommon/JitBlockCache.h"
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#include "Core/MIPS/JitCommon/JitState.h"
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#include "Core/MIPS/JitCommon/NativeJit.h"
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#include "Core/MIPS/x86/JitSafeMem.h"
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#include "Core/MIPS/x86/RegCache.h"
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#include "Core/MIPS/x86/RegCacheFPU.h"
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class PointerWrap;
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namespace MIPSComp {
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// This is called when Jit hits a breakpoint. Returns 1 when hit.
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u32 JitBreakpoint();
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// TODO: Hmm, humongous.
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struct RegCacheState {
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GPRRegCacheState gpr;
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FPURegCacheState fpr;
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};
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class Jit : public Gen::XCodeBlock, public JitInterface {
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public:
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Jit(MIPSState *mips);
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virtual ~Jit();
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const JitOptions &GetJitOptions() { return jo; }
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void DoState(PointerWrap &p);
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void DoDummyState(PointerWrap &p);
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// Compiled ops should ignore delay slots
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// the compiler will take care of them by itself
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// OR NOT
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void Comp_Generic(MIPSOpcode op) override;
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void RunLoopUntil(u64 globalticks) override;
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void Compile(u32 em_address) override; // Compiles a block at current MIPS PC
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const u8 *DoJit(u32 em_address, JitBlock *b);
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bool DescribeCodePtr(const u8 *ptr, std::string &name) override;
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void Comp_RunBlock(MIPSOpcode op) override;
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void Comp_ReplacementFunc(MIPSOpcode op) override;
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// Ops
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void Comp_ITypeMem(MIPSOpcode op) override;
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void Comp_Cache(MIPSOpcode op) override;
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void Comp_RelBranch(MIPSOpcode op) override;
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void Comp_RelBranchRI(MIPSOpcode op) override;
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void Comp_FPUBranch(MIPSOpcode op) override;
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void Comp_FPULS(MIPSOpcode op) override;
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void Comp_FPUComp(MIPSOpcode op) override;
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void Comp_Jump(MIPSOpcode op) override;
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void Comp_JumpReg(MIPSOpcode op) override;
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void Comp_Syscall(MIPSOpcode op) override;
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void Comp_Break(MIPSOpcode op) override;
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void Comp_IType(MIPSOpcode op) override;
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void Comp_RType2(MIPSOpcode op) override;
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void Comp_RType3(MIPSOpcode op) override;
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void Comp_ShiftType(MIPSOpcode op) override;
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void Comp_Allegrex(MIPSOpcode op) override;
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void Comp_Allegrex2(MIPSOpcode op) override;
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void Comp_VBranch(MIPSOpcode op) override;
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void Comp_MulDivType(MIPSOpcode op) override;
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void Comp_Special3(MIPSOpcode op) override;
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void Comp_FPU3op(MIPSOpcode op) override;
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void Comp_FPU2op(MIPSOpcode op) override;
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void Comp_mxc1(MIPSOpcode op) override;
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void Comp_SV(MIPSOpcode op) override;
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void Comp_SVQ(MIPSOpcode op) override;
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void Comp_VPFX(MIPSOpcode op) override;
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void Comp_VVectorInit(MIPSOpcode op) override;
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void Comp_VMatrixInit(MIPSOpcode op) override;
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void Comp_VDot(MIPSOpcode op) override;
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void Comp_VecDo3(MIPSOpcode op) override;
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void Comp_VV2Op(MIPSOpcode op) override;
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void Comp_Mftv(MIPSOpcode op) override;
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void Comp_Vmfvc(MIPSOpcode op) override;
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void Comp_Vmtvc(MIPSOpcode op) override;
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void Comp_Vmmov(MIPSOpcode op) override;
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void Comp_VScl(MIPSOpcode op) override;
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void Comp_Vmmul(MIPSOpcode op) override;
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void Comp_Vmscl(MIPSOpcode op) override;
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void Comp_Vtfm(MIPSOpcode op) override;
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void Comp_VHdp(MIPSOpcode op) override;
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void Comp_VCrs(MIPSOpcode op) override;
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void Comp_VDet(MIPSOpcode op) override;
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void Comp_Vi2x(MIPSOpcode op) override;
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void Comp_Vx2i(MIPSOpcode op) override;
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void Comp_Vf2i(MIPSOpcode op) override;
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void Comp_Vi2f(MIPSOpcode op) override;
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void Comp_Vh2f(MIPSOpcode op) override;
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void Comp_Vcst(MIPSOpcode op) override;
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void Comp_Vhoriz(MIPSOpcode op) override;
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void Comp_VRot(MIPSOpcode op) override;
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void Comp_VIdt(MIPSOpcode op) override;
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void Comp_Vcmp(MIPSOpcode op) override;
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void Comp_Vcmov(MIPSOpcode op) override;
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void Comp_Viim(MIPSOpcode op) override;
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void Comp_Vfim(MIPSOpcode op) override;
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void Comp_VCrossQuat(MIPSOpcode op) override;
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void Comp_Vsgn(MIPSOpcode op) override;
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void Comp_Vocp(MIPSOpcode op) override;
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void Comp_ColorConv(MIPSOpcode op) override;
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void Comp_Vbfy(MIPSOpcode op) override;
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void Comp_DoNothing(MIPSOpcode op) override;
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int Replace_fabsf() override;
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void ApplyPrefixST(u8 *vregs, u32 prefix, VectorSize sz);
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void ApplyPrefixD(const u8 *vregs, VectorSize sz);
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void GetVectorRegsPrefixS(u8 *regs, VectorSize sz, int vectorReg) {
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_assert_(js.prefixSFlag & JitState::PREFIX_KNOWN);
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GetVectorRegs(regs, sz, vectorReg);
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ApplyPrefixST(regs, js.prefixS, sz);
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}
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void GetVectorRegsPrefixT(u8 *regs, VectorSize sz, int vectorReg) {
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_assert_(js.prefixTFlag & JitState::PREFIX_KNOWN);
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GetVectorRegs(regs, sz, vectorReg);
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ApplyPrefixST(regs, js.prefixT, sz);
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}
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void GetVectorRegsPrefixD(u8 *regs, VectorSize sz, int vectorReg);
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void EatPrefix() { js.EatPrefix(); }
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void RestoreRoundingMode(bool force = false);
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void ApplyRoundingMode(bool force = false);
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void UpdateRoundingMode();
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JitBlockCache *GetBlockCache() { return &blocks; }
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void ClearCache();
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void InvalidateCache() override;
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void InvalidateCacheAt(u32 em_address, int length = 4) {
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if (blocks.RangeMayHaveEmuHacks(em_address, em_address + length)) {
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blocks.InvalidateICache(em_address, length);
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}
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}
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const u8 *GetDispatcher() const override {
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return dispatcher;
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}
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private:
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void GenerateFixedCode(JitOptions &jo);
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void GetStateAndFlushAll(RegCacheState &state);
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void RestoreState(const RegCacheState& state);
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void FlushAll();
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void FlushPrefixV();
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void WriteDowncount(int offset = 0);
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bool ReplaceJalTo(u32 dest);
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u32 GetCompilerPC();
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// See CompileDelaySlotFlags for flags.
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void CompileDelaySlot(int flags, RegCacheState *state = NULL);
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void CompileDelaySlot(int flags, RegCacheState &state) {
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CompileDelaySlot(flags, &state);
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}
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void EatInstruction(MIPSOpcode op);
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void AddContinuedBlock(u32 dest);
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MIPSOpcode GetOffsetInstruction(int offset);
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void WriteExit(u32 destination, int exit_num);
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void WriteExitDestInReg(Gen::X64Reg reg);
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// void WriteRfiExitDestInEAX();
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void WriteSyscallExit();
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bool CheckJitBreakpoint(u32 addr, int downcountOffset);
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// Utility compilation functions
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void BranchFPFlag(MIPSOpcode op, Gen::CCFlags cc, bool likely);
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void BranchVFPUFlag(MIPSOpcode op, Gen::CCFlags cc, bool likely);
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void BranchRSZeroComp(MIPSOpcode op, Gen::CCFlags cc, bool andLink, bool likely);
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void BranchRSRTComp(MIPSOpcode op, Gen::CCFlags cc, bool likely);
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void BranchLog(MIPSOpcode op);
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void BranchLogExit(MIPSOpcode op, u32 dest, bool useEAX);
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// Utilities to reduce duplicated code
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void CompImmLogic(MIPSOpcode op, void (XEmitter::*arith)(int, const Gen::OpArg &, const Gen::OpArg &));
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void CompTriArith(MIPSOpcode op, void (XEmitter::*arith)(int, const Gen::OpArg &, const Gen::OpArg &), u32 (*doImm)(const u32, const u32), bool invertResult = false);
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void CompShiftImm(MIPSOpcode op, void (XEmitter::*shift)(int, Gen::OpArg, Gen::OpArg), u32 (*doImm)(const u32, const u32));
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void CompShiftVar(MIPSOpcode op, void (XEmitter::*shift)(int, Gen::OpArg, Gen::OpArg), u32 (*doImm)(const u32, const u32));
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void CompITypeMemRead(MIPSOpcode op, u32 bits, void (XEmitter::*mov)(int, int, Gen::X64Reg, Gen::OpArg), const void *safeFunc);
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template <typename T>
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void CompITypeMemRead(MIPSOpcode op, u32 bits, void (XEmitter::*mov)(int, int, Gen::X64Reg, Gen::OpArg), T (*safeFunc)(u32 addr)) {
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CompITypeMemRead(op, bits, mov, (const void *)safeFunc);
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}
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void CompITypeMemWrite(MIPSOpcode op, u32 bits, const void *safeFunc);
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template <typename T>
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void CompITypeMemWrite(MIPSOpcode op, u32 bits, void (*safeFunc)(T val, u32 addr)) {
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CompITypeMemWrite(op, bits, (const void *)safeFunc);
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}
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void CompITypeMemUnpairedLR(MIPSOpcode op, bool isStore);
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void CompITypeMemUnpairedLRInner(MIPSOpcode op, Gen::X64Reg shiftReg);
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void CompBranchExits(Gen::CCFlags cc, u32 targetAddr, u32 notTakenAddr, bool delaySlotIsNice, bool likely, bool andLink);
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void CompBranchExit(bool taken, u32 targetAddr, u32 notTakenAddr, bool delaySlotIsNice, bool likely, bool andLink);
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static Gen::CCFlags FlipCCFlag(Gen::CCFlags flag);
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static Gen::CCFlags SwapCCFlag(Gen::CCFlags flag);
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void CopyFPReg(Gen::X64Reg dst, Gen::OpArg src);
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void CompFPTriArith(MIPSOpcode op, void (XEmitter::*arith)(Gen::X64Reg reg, Gen::OpArg), bool orderMatters);
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void CompFPComp(int lhs, int rhs, u8 compare, bool allowNaN = false);
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void CompVrotShuffle(u8 *dregs, int imm, int n, bool negSin);
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void CallProtectedFunction(const void *func, const Gen::OpArg &arg1);
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void CallProtectedFunction(const void *func, const Gen::OpArg &arg1, const Gen::OpArg &arg2);
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void CallProtectedFunction(const void *func, const u32 arg1, const u32 arg2, const u32 arg3);
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void CallProtectedFunction(const void *func, const Gen::OpArg &arg1, const u32 arg2, const u32 arg3);
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template <typename Tr, typename T1>
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void CallProtectedFunction(Tr (*func)(T1), const Gen::OpArg &arg1) {
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CallProtectedFunction((const void *)func, arg1);
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}
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template <typename Tr, typename T1, typename T2>
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void CallProtectedFunction(Tr (*func)(T1, T2), const Gen::OpArg &arg1, const Gen::OpArg &arg2) {
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CallProtectedFunction((const void *)func, arg1, arg2);
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}
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template <typename Tr, typename T1, typename T2, typename T3>
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void CallProtectedFunction(Tr (*func)(T1, T2, T3), const u32 arg1, const u32 arg2, const u32 arg3) {
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CallProtectedFunction((const void *)func, arg1, arg2, arg3);
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}
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template <typename Tr, typename T1, typename T2, typename T3>
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void CallProtectedFunction(Tr (*func)(T1, T2, T3), const Gen::OpArg &arg1, const u32 arg2, const u32 arg3) {
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CallProtectedFunction((const void *)func, arg1, arg2, arg3);
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}
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bool PredictTakeBranch(u32 targetAddr, bool likely);
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bool CanContinueBranch(u32 targetAddr) {
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if (!jo.continueBranches || js.numInstructions >= jo.continueMaxInstructions) {
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return false;
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}
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// Need at least 2 exits left over.
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if (js.nextExit >= MAX_JIT_BLOCK_EXITS - 2) {
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return false;
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}
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// Sometimes we predict wrong and get into impossible conditions where games have jumps to 0.
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if (!targetAddr) {
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return false;
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}
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return true;
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}
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bool CanContinueJump(u32 targetAddr) {
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if (!jo.continueJumps || js.numInstructions >= jo.continueMaxInstructions) {
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return false;
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}
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if (!targetAddr) {
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return false;
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}
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return true;
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}
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bool CanContinueImmBranch(u32 targetAddr) {
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if (!jo.immBranches || js.numInstructions >= jo.continueMaxInstructions) {
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return false;
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}
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return true;
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}
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JitBlockCache blocks;
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JitOptions jo;
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JitState js;
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GPRRegCache gpr;
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FPURegCache fpr;
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ThunkManager thunks;
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JitSafeMemFuncs safeMemFuncs;
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MIPSState *mips_;
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const u8 *enterDispatcher;
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const u8 *outerLoop;
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const u8 *dispatcher;
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const u8 *dispatcherCheckCoreState;
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const u8 *dispatcherNoCheck;
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const u8 *dispatcherInEAXNoCheck;
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const u8 *breakpointBailout;
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const u8 *restoreRoundingMode;
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const u8 *applyRoundingMode;
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const u8 *updateRoundingMode;
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const u8 *endOfPregeneratedCode;
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friend class JitSafeMem;
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friend class JitSafeMemFuncs;
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};
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} // namespace MIPSComp
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