Bovine 185d4db081 Fix simd vmmul transpose optimizations. ... Need to ensure S has been written back before transposing it or we'll end up writing back S'.		2015-01-03 14:48:54 -07:00
..
Asm.cpp	x86jit: Shave off a couple bytes in asm.	2014-12-17 08:25:18 -08:00
Asm.h	x86jit: Use R15 when safe for the jit.	2014-12-17 08:09:59 -08:00
CompALU.cpp	Some work towards being able to build two JITs together	2014-12-13 21:13:54 +01:00
CompBranch.cpp	Namespacing cleanup (it's bad to do "using namespace" in a header)	2014-12-07 14:44:15 +01:00
CompFPU.cpp	Some work towards being able to build two JITs together	2014-12-13 21:13:54 +01:00
CompLoadStore.cpp	x86 jit: Allow storing all imms directly without bouncing to a register, not just zero.	2014-12-23 22:25:53 +01:00
CompReplace.cpp	Split JitCommon.h so that you can include it without getting the "NativeJit" definition	2014-12-13 21:13:28 +01:00
CompVFPU.cpp	Fix simd vmmul transpose optimizations.	2015-01-03 14:48:54 -07:00
Jit.cpp	x86jit: Fix another sequential detect problem.	2014-12-31 22:43:31 -08:00
Jit.h	x86jit: Use R15 when safe for the jit.	2014-12-17 08:09:59 -08:00
JitSafeMem.cpp	jit: Use nicknames for a few more static regs.	2014-12-17 01:11:33 -08:00
JitSafeMem.h	Some work towards being able to build two JITs together	2014-12-13 21:13:54 +01:00
RegCache.cpp	x86jit: Use R15 when safe for the jit.	2014-12-17 08:09:59 -08:00
RegCache.h	x86jit: Use R15 when safe for the jit.	2014-12-17 08:09:59 -08:00
RegCacheFPU.cpp	x86jit: Fix another sequential detect problem.	2014-12-31 22:43:31 -08:00
RegCacheFPU.h	jit: Make available js_ and jo_ in regcaches.	2014-12-07 21:07:23 -08:00