Commit graph

30 commits

Author SHA1 Message Date
Unknown W. Brackets
6df939034a Core: Cleanup some sign extensions for clarity. 2023-04-05 17:16:51 -07:00
M4xw
b9352354c9 Masked PSP Memory support for the AArch64 Dynarec 2019-04-15 12:07:57 +02:00
Unknown W. Brackets
419c1fbd73 Jit: Respect flags for jit types and features.
Left some free space for more.
2019-02-03 14:57:08 -08:00
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eb4b59b530 arm64jit: Enable breakpoints.
Memory breakpoints not yet really tested.
2018-06-06 17:31:56 -07:00
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ab809bd19e jit: Apply hasSetRounding at compile time.
Otherwise, the block will be executed with the wrong rounding mode the
first time rounding is set.  This could be important if it was set for a
single operation.

This is only a problem the first time it's set.
2018-04-01 10:36:16 -07:00
Unknown W. Brackets
5177db0f91 arm64jit: Remove unnecessary address masking.
We use views like on x86_64, so this isn't needed.
2017-12-28 23:58:30 -08:00
Unknown W. Brackets
6fd17fb026 arm64jit: Use reg sum for LDR/STR.
Skips an add, and should be less ops anyway.
2017-12-28 10:19:55 -08:00
Unknown W. Brackets
092f98d313 arm64jit: Fix an integer truncation warning. 2017-12-27 19:39:04 -08:00
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7c2fc90def arm64jit: Avoid MOVK elsewhere without pointerify. 2017-12-27 17:57:19 -08:00
Florent Castelli
8c3552de74 cmake: Detect features at compile time
Instead of relying on manually passed down flags from CMake,
we now have ppsspp_config.h file to create the platform defines for us.
This improves support for multiplatform builds (such as iOS).
2016-10-19 12:31:19 +02:00
Henrik Rydgard
8a3c96a413 ARM64: Don't need to avoid destroying SCRATCH1 in these functions. 2015-10-08 14:54:43 +02:00
Unknown W. Brackets
66adc4e695 jit: Normalize CONDITIONAL_DISABLE formatting. 2015-07-02 20:31:37 -07:00
Unknown W. Brackets
1d1c80d9cf arm64: Use BFI for cfc1. 2015-07-02 20:31:35 -07:00
Unknown W. Brackets
b6612edf67 arm64: Use a cached rounding func for cvt.w.s.
This is much faster for this particular instruction, although not all
games even use it.
2015-06-28 12:40:29 -07:00
Unknown W. Brackets
1c163e4817 arm64: Avoid an ORR for c.ueq.
This is about 15% faster for this single, uncommon instruction on A57.
2015-06-28 10:52:17 -07:00
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febe435946 arm64: Use FP load/stores for non-reg pointers. 2015-06-28 10:45:44 -07:00
Unknown W. Brackets
fbd4db0fc4 arm64: Add a safemem path.
This is probably not optimal but at least it works.
2015-06-27 00:22:04 -07:00
Unknown W. Brackets
b3aa6d89e9 Fix UBFX encoding (thanks SonicAdvance1.) 2015-06-26 21:27:03 -07:00
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b0d291032d armjit Avoid cfc1/mfc1 to $0. 2015-04-07 18:30:36 -07:00
Henrik Rydgard
0a70618f87 ARM64: Accurate floating point rounding. For some reason, FTZ doesn't seem to work though. 2015-04-06 18:13:36 +02:00
Henrik Rydgard
44286a2b37 ARM64: Accurate float->int conversion with rounding mode. 2015-04-06 18:13:34 +02:00
Henrik Rydgard
8eedcc7fb0 ARM64: Speedup fpu/vfpu load/stores too using "pointerification". Actually noticeable gain. 2015-04-06 18:13:32 +02:00
Henrik Rydgard
34e61ab875 ARM64: More FPU instructions (int<->float convert), minor stuff 2015-04-06 18:13:25 +02:00
Henrik Rydgard
25ec85551f ARM64: Implement FP compares, misc 2015-04-06 18:13:22 +02:00
Henrik Rydgard
5dff3f8c89 ARM64: Implement scalar FMOV. This makes the FPU2op ops work. 2015-04-06 18:13:16 +02:00
Henrik Rydgard
4233921ab7 ARM64: Some more instructions, func replacements 2015-04-06 18:13:16 +02:00
Henrik Rydgard
2bca05c4f2 ARM64: implement shifts, movz/movn. Corresponding fixes to emitter/disasm 2015-04-06 18:13:14 +02:00
Henrik Rydgard
0922db6062 ARM64: Some FP work. 2015-04-06 18:13:11 +02:00
Henrik Rydgard
d2c746dd64 ARM64: Get the FP reg cache working, implement some basic FP arith 2015-04-06 18:13:11 +02:00
Henrik Rydgard
b309c83973 Initial work on ARM64, based on the ARM jit. 2015-04-06 18:13:01 +02:00