Unknown W. Brackets
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cfac7324d6
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Implement vscl in the x86 jit.
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2013-04-20 01:15:14 -07:00 |
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Unknown W. Brackets
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d051ea3106
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Flush when checking for memcheck coreStates.
Trouble is this has to be done outside the lock. So, moved out.
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2013-03-09 02:41:50 -08:00 |
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Unknown W. Brackets
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d10bdd6938
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Basic working imm mem breakpoints in x86 jit.
Seems to work okay. Doen't cover HLE of course.
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2013-03-09 02:41:48 -08:00 |
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Unknown W. Brackets
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6290b67984
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Validate the full memory access is valid.
Probably barely matters, but since we have the size now anyway...
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2013-03-09 02:41:47 -08:00 |
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Unknown W. Brackets
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2d6a730cac
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Add some basics for memory checks to x86 jit.
Specifically, we will need to be able to bail in delayslots,
and we will need to know the size of the access (useful anyway.)
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2013-03-09 02:41:46 -08:00 |
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Unknown W. Brackets
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c4ab0855b4
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Make sure interpreter and jit savestates match.
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2013-03-08 08:49:21 -08:00 |
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Unknown W. Brackets
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313ffdb495
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Add a stub for clz/clo in x86 jit.
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2013-02-21 01:25:02 -08:00 |
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Unknown W. Brackets
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2db368c29a
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Add more imm handling for shifts in x86 jit.
This is actually hit, and propagates more imms through.
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2013-02-21 01:25:00 -08:00 |
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Unknown W. Brackets
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a438791e7c
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Initial (very inefficient) vmmov for x86 jit.
This makes #464 work (at least LittleBigPlanet), but only in x86 jit.
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2013-02-18 23:21:18 -08:00 |
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Unknown W. Brackets
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b8e2177591
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Jit vzero/vone, which are easy and common (x86.)
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2013-02-18 22:15:47 -08:00 |
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Unknown W. Brackets
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2dfdf3ffeb
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Implement Comp_VV2Op vfpu ops in the x86 jit.
Also, some cleanup. No need for this extra boilerplate, simplify...
This makes the Bink video issue slightly better, in jit only.
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2013-02-18 20:43:28 -08:00 |
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Unknown W. Brackets
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afb7c0b83c
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Assume prefixes start default until proven wrong.
Currently this means nothing since the MIPSTables flags are wrong.
It will blow the cache once, after the first vfpu op.
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2013-02-18 01:14:57 -08:00 |
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Unknown W. Brackets
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8ea59990ab
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Make applying prefixes mostly automatic.
And implement (hopefully) D prefixes.
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2013-02-18 00:11:57 -08:00 |
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Unknown W. Brackets
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27942606ad
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Use prefixD directly in jit, just like interp now.
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2013-02-17 22:46:34 -08:00 |
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Unknown W. Brackets
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08a42a1aaf
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Preserve orig regs when applying vfpu prefixes.
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2013-02-17 22:37:56 -08:00 |
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Unknown W. Brackets
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f532951331
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Automatically eat prefixes in x86 jit.
Simplifies the code and makes it easier to know they're eaten
even for ops not yet jitted.
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2013-02-17 17:53:53 -08:00 |
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Unknown W. Brackets
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2b441f1638
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Initial implementation of jit vadd/vsub/vdiv/vmul.
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2013-02-15 08:35:34 -08:00 |
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Unknown W. Brackets
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b9506c9568
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Minor cleanup for vdot in x86 jit.
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2013-02-15 08:35:34 -08:00 |
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Unknown W. Brackets
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ccad259ae5
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Keep track of VFPU prefixes and flush them in jit.
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2013-02-15 08:35:33 -08:00 |
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Unknown W. Brackets
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4eca76e0cc
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Check for s/t/d prefix reg changes in jit.
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2013-02-14 00:27:09 -08:00 |
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Unknown W. Brackets
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19cc652a37
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Correct NaN handling in fpu comparisons.
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2013-02-13 01:54:07 -08:00 |
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Henrik Rydgard
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78923f5538
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Jit a little more (vfpu single load/store, transfer instructions)
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2013-02-10 12:14:55 +01:00 |
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Unknown W. Brackets
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f777c872e6
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Jit unaligned reads/writes.
This mostly just improves perf on debug, not really on the map for release.
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2013-02-02 13:12:34 -08:00 |
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Unknown W. Brackets
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44b5adeaac
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Properly jit the break instruction.
Otherwise, it just keeps on going past it.
We never want to hit this anyway, but it's good to know if we do.
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2013-02-01 00:49:14 -08:00 |
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Henrik Rydgard
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90b11bba37
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Implement mult, multu, mflo/hi, mtlo/hi in x86 JIT
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2013-01-29 00:48:42 +01:00 |
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Unknown W. Brackets
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a7b5433ba7
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Make sure fastmem isn't confused by rs changing.
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2013-01-26 23:18:50 -08:00 |
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Unknown W. Brackets
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a89d61463e
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Make the VFPU jit use far jumps for memory access.
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2013-01-26 23:08:19 -08:00 |
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Unknown W. Brackets
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0e8e9697c5
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Add lv.q/sv.q support to the x86 jit.
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2013-01-26 10:09:18 -08:00 |
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Unknown W. Brackets
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b77ce99d01
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Oops, no slow read for immediates usually.
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2013-01-26 09:27:52 -08:00 |
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Unknown W. Brackets
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9cd5836b85
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Rename WriteFinish() to Finish() is safe mem.
It's nothing to do with writing.
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2013-01-26 09:09:47 -08:00 |
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Unknown W. Brackets
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3e419f513a
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Refactor jit safe memory reads without dup code.
But, maybe too automagical...
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2013-01-26 08:42:34 -08:00 |
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Henrik Rydgard
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2738417040
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VFPU JIT: start setting up infrastructure. very incomplete. vdot works if undisabled, but isn't complete.
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2013-01-26 01:34:19 +01:00 |
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Henrik Rydgard
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68991511ee
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Split out the FPU reg cache into its own file too.
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2013-01-26 01:34:19 +01:00 |
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Henrik Rydgard
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aabc0aa9ef
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Quick implementation of LV.Q and SV.Q in x86/x64 JIT
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2013-01-25 19:50:30 +01:00 |
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Henrik Rydgård
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0f080aeaaa
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Merge pull request #492 from unknownbrackets/jit-minor
ALU jit optimizations
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2013-01-25 01:01:34 -08:00 |
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Unknown W. Brackets
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ab9bea068c
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Jit reg+reg compile time, and avoid flushing EDX.
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2013-01-25 00:16:55 -08:00 |
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Unknown W. Brackets
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2eba209f64
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Move around the jit nice delay slot logic.
Nice delay slots don't not save flags, they run before the CMP.
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2013-01-24 07:31:51 -08:00 |
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Unknown W. Brackets
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c324983340
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Make the jit support bltzal and friends.
Fixes problems with jit in games. Android changes completely untested.
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2013-01-22 08:04:01 -08:00 |
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Unknown W. Brackets
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a9d0390426
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Adjust downcount before syscalls, not after.
This makes jit slightly slower for syscalls, but it's minor and makes
sure jit and interpreter timing are determistically the same.
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2013-01-21 22:57:53 -08:00 |
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Unknown W. Brackets
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c897e6446a
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Don't over decr downcount when hitting a jit bp.
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2013-01-21 19:41:12 -08:00 |
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Unknown W. Brackets
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dd69694302
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Add some optional logging to debug jit branching.
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2013-01-20 19:48:55 -08:00 |
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Unknown W. Brackets
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776eb8ab2e
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Simplify CompileDelaySlot().
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2013-01-20 19:48:54 -08:00 |
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Unknown W. Brackets
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e78223d2c0
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Since flipping the op is easy, also do lb/lh.
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2013-01-19 16:25:57 -08:00 |
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Unknown W. Brackets
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72e547420d
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Refactor jit slowmem, add lbu to jit since easy.
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2013-01-19 11:11:45 -08:00 |
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Unknown W. Brackets
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5305017fc3
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Properly save registers before the slowmem call.
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2013-01-19 11:11:44 -08:00 |
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Unknown W. Brackets
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11c5cdfdb0
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Refactor out all the CheckJitBreakpoint()s.
Ah, much cleaner.
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2013-01-18 21:33:23 -08:00 |
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Unknown W. Brackets
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40ae3dfe45
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Correctly break at branch points in x86 jit.
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2013-01-18 21:12:53 -08:00 |
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Unknown W. Brackets
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beac991a9e
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Clear jit cache when changing breakpoints.
For now, only when paused. I don't think clearing the cache while
running is an awesome idea.
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2013-01-18 20:12:53 -08:00 |
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Henrik Rydgard
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674911ddba
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Move downcount into MIPSState for efficiency, enable block linking.
On ARM JIT we can now reach it through the cpu context reg.
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2013-01-12 00:44:18 +01:00 |
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Henrik Rydgård
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f9133c1a56
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Reset JIT before saving/loading state
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2012-12-29 00:10:43 +01:00 |
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