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79 commits

Author SHA1 Message Date
Unknown W. Brackets
33b073c545 Jit: Fix syscall outside delay slot. 
Doesn't happen in real games, but useful in debug code.
 2017-06-04 10:39:01 -07:00
Henrik Rydgård
62dcb9c70c Log if Comp_SysCall encounters bad syscall instructions 2017-03-10 00:13:06 +01:00
Henrik Rydgård
e74749f2b2 A function renamed, some logging improvements 2017-03-10 00:11:00 +01:00
Florent Castelli
8c3552de74 cmake: Detect features at compile time 
Instead of relying on manually passed down flags from CMake,
we now have ppsspp_config.h file to create the platform defines for us.
This improves support for multiplatform builds (such as iOS).
 2016-10-19 12:31:19 +02:00
Unknown W. Brackets
3ec7404d2d Jit: Always link RA, even if branch not taken. 
The ops don't write RA conditionally.
 2015-12-27 20:47:15 -08:00
Unknown W. Brackets
8fdceba7ca Add timing for all the basics. 
This way we can see overall stats for a frame.
 2015-07-03 12:05:08 -07:00
Unknown W. Brackets
213ad4bcc9 arm64: Cleanup branch code a tiny bit. 
Want to make it clear that we can't kill W0 at this point (delay slots.)
 2015-06-28 09:28:54 -07:00
Henrik Rydgård
81dec36da8 Use an accessor to read the compilerPC. 
In the IR it will be read from the block.
 2015-04-11 01:14:37 -07:00
Henrik Rydgård
a897723e6a Separate out jit reading nearby instructions. 
This makes it easier to use an IR for these things, or remove them.
 2015-04-11 00:53:24 -07:00
Unknown W. Brackets
788b9d78f8 jit: Avoid a super unlikely write to zero. 2015-04-07 18:20:37 -07:00
Unknown W. Brackets
179e996b0b jit: Discard unused regs before a syscall. 
This is a pretty minor optimization, though.
 2015-03-01 11:08:59 -08:00
Henrik Rydgard
b2951f0def Transplant Dolphin's ARM64 emitter over. Not hooked up to anything (yet...) 2014-12-15 22:09:26 +01:00
Henrik Rydgard
05a8e2e35d Some work towards being able to build two JITs together 
This will be useful for testing/debugging, but not there yet.
 2014-12-13 21:13:54 +01:00
Henrik Rydgard
51d55bd645 Namespacing cleanup (it's bad to do "using namespace" in a header) 2014-12-07 14:44:15 +01:00
Henrik Rydgard
4457dca4c9 Rename the ARM Jit class to ArmJit 2014-12-07 14:25:22 +01:00
Unknown W. Brackets
1064f580e4 armjit: Add proxy blocks for continuing. 2014-10-12 17:20:26 -07:00
Unknown W. Brackets
2f598e8f38 jit: Statically jump for fixed branches. 
This handles both loops (first step is known) and static branches (some
code uses them instead of jumps, and we disassemble that to "b".)

Not likely to be a big improvement, but might help if the branch predictor
was wrong.

This is as opposed to continuing, which would build a larger jit block.
 2014-10-12 12:51:47 -07:00
Unknown W. Brackets
9228ac72da jit: Reorganize imm branch logic a bit. 2014-10-12 12:51:46 -07:00
Unknown W. Brackets
8d0dca71fe jit: Rename the rounding mode funcs to clarify. 
They apply/restore the value, set/clear is confusing.
 2014-10-12 11:35:20 -07:00
Unknown W. Brackets
8daff0a25e armjit: Fix some downcount issues with rounding. 
When setting the rounding mode we need to be super careful about not
destroying flags or R0 if they are needed.
 2014-08-30 16:43:13 -07:00
Unknown W. Brackets
e9b5e6f277 armjit: Maintain rounding mode throughout jit. 2014-08-22 19:57:50 -07:00
Unknown W. Brackets
1fcbb7bbd4 armjit: Respect the rounding mode for mul/etc. 2014-08-22 00:32:01 -07:00
Unknown W. Brackets
0078faef8b Fix some log semicolons that might affect logic. 
But, these should all be right.
 2014-06-29 19:09:38 -07:00
Unknown W. Brackets
5a89c17cf0 armjit: Allow R1 in regalloc, use LR as temp. 
LR should be safe, although it may make stack traces not work within jit,
they don't really tend to work anyway.
 2014-03-28 18:38:38 -07:00
Unknown W. Brackets
05ab192c9c Reduce includes in Core/HLE/. 
Especially templates.
 2014-03-15 11:22:19 -07:00
Henrik Rydgard
1cb7965cb1 Jit feature preparation: Introduce "proxy blocks". 
When these are invalidated, the block they point to gets invalidated too.

Will be useful to implement various types of block merging and function inlining
without affecting correctness of cache clears etc.

Also, with this commit we can now fully inline replaced functions. fabsf() boils
down to 1-2 instructions and the block continues, for example.
 2013-12-19 00:39:49 +01:00
Unknown W. Brackets
763eff181d Fix handling of jalr when delay slot changes rd. 2013-11-14 23:39:13 -08:00
Henrik Rydgård
ef8631c57f Cache VFPU_CTRL_CC in a register 2013-11-12 17:58:29 +01:00
Henrik Rydgård
17074f5a7f Cache fpcond in a register to avoid store/load between compare and branch 2013-11-12 10:33:38 +01:00
Unknown W. Brackets
bb960480c8 x86/armjit: Stop compiling on a jump to invalid. 2013-11-10 21:59:50 -08:00
Unknown W. Brackets
359110f010 x86/armjit: Add jump following (off by default.) 
Inlines function calls up to a certain extent.  Allows us to get
immediates all the way to a syscall, for example, usually.

Not sure if faster.
 2013-11-10 21:59:49 -08:00
Unknown W. Brackets
aacb31bc18 armjit: Copy over (disabled) immbranch optim. 
This does a little loop unrolling.  Costs a bit more cache space, but
avoids flushing regs for longer.

Not enabled.
 2013-11-10 21:59:48 -08:00
Unknown W. Brackets
7e46ee0b0f armjit: Replace MOVI2R with using the regcache. 
So that it can optimize the value with existing imms.

Not actually optimizing yet.
 2013-11-10 15:50:45 -08:00
Unknown W. Brackets
1cc68f50ca armjit: Small optimization to syscall instr. 2013-11-10 14:38:10 -08:00
Unknown W. Brackets
b30928036e armjit: Avoid flushing an imm in beq/bne/etc. 
We might be able to STMIA it instead.
 2013-11-10 14:38:10 -08:00
Henrik Rydgard
5a95e267fb Add an optimization to discard registers at the end of functions when possible. 
Works in some games but crashes many so hiding it for now. Do not add UI.
 2013-11-08 12:43:48 +01:00
Henrik Rydgard
91393093bc Re-enable the "nice delay slot" optimization on ARM 2013-11-07 15:29:12 +01:00
Henrik Rydgård
1e158fa652 ARM vtx dec: Preserving our FP scratch register appears to improve 
stability.

Also added some logging.
 2013-11-06 11:47:26 +01:00
Henrik Rydgard
6483c0c2cd Two minor armjit optimizations 2013-11-05 16:25:01 +01:00
Unknown W. Brackets
732ae13ebb Fast path CallSyscall where possible. 
It seems we're spending a decent amount of time there, which isn't
entirely unexpected.  We can eliminate some things easily.
 2013-11-04 07:59:37 -08:00
Unknown W. Brackets
9a707f6c00 Fix typo, ARM build. 2013-10-17 15:28:50 -07:00
Unknown W. Brackets
2e8ef3027f Write the retaddr to rd, not always ra, in jalr. 
Thanks go entirely to @Kingcom for pointing this out.

Don't know of any games not using RA as the rd.
 2013-10-17 07:39:33 -07:00
Unknown W. Brackets
3a1b6fb269 Fix some sign comparison warnings. 2013-10-05 11:13:41 -07:00
Unknown W. Brackets
97aa1a631e Improve typesafety in the x86 regalloc. 2013-08-24 19:41:10 -07:00
Unknown W. Brackets
109ad17ac6 Use a typesafe struct for opcodes. 
Also, correctly read delayslots using Read_Instruction on ARM.
 2013-08-24 15:36:24 -07:00
Unknown W. Brackets
8327cd0f8e Clean up some inconsistency in jit branches on arm. 2013-08-16 02:02:56 -07:00
Unknown W. Brackets
2758634a0f Avoid overhead calling __KernelIdle(). 
~1.8% improvement in Zettai Hero Project.
 2013-08-15 01:35:17 -07:00
Unknown W. Brackets
5387e5c717 Oops, typo. 2013-08-15 00:38:53 -07:00
Unknown W. Brackets
df50e03146 Add a safety log for cases we don't handle right. 2013-08-14 23:14:25 -07:00
Unknown W. Brackets
e639f8d15f Handle branches in VFPU delay slots better. 
Based on tests on a PSP, all branches are attempted.  The behavior is
technically undefined.

It seems to take the delay slot's target if they differ and both pass.
This is the behavior the interpreter has, but it's more work in jit.

Since only a couple games seem to do this, and clearly expect this
behavior, this fixes all known cases of #1926.
 2013-08-14 22:56:02 -07:00