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117 commits

Author SHA1 Message Date
Unknown W. Brackets
0fc774927f jit: Minor cleanups. 2016-01-10 12:28:29 -08:00
Henrik Rydgard
c41baab747 Pregenerate code to handle rounding mode switches. This time, for all three cores. 2015-10-08 19:58:37 +02:00
Henrik Rydgard
b7725c4f40 Remove empty header files 2015-10-08 18:54:33 +02:00
Henrik Rydgård
d014d420db Unify JitOptions across the backends. 
This is required to make ExtractIR not a member of the various backends.
 2015-04-12 11:41:26 -07:00
Henrik Rydgård
81dec36da8 Use an accessor to read the compilerPC. 
In the IR it will be read from the block.
 2015-04-11 01:14:37 -07:00
Henrik Rydgård
a897723e6a Separate out jit reading nearby instructions. 
This makes it easier to use an IR for these things, or remove them.
 2015-04-11 00:53:24 -07:00
Henrik Rydgard
b2951f0def Transplant Dolphin's ARM64 emitter over. Not hooked up to anything (yet...) 2014-12-15 22:09:26 +01:00
Henrik Rydgard
5de011fe95 Again, sigh.. 2014-12-13 21:53:28 +01:00
Henrik Rydgard
db5478135b Typo fix 2014-12-13 21:26:13 +01:00
Henrik Rydgard
05a8e2e35d Some work towards being able to build two JITs together 
This will be useful for testing/debugging, but not there yet.
 2014-12-13 21:13:54 +01:00
Henrik Rydgard
51d55bd645 Namespacing cleanup (it's bad to do "using namespace" in a header) 2014-12-07 14:44:15 +01:00
Henrik Rydgard
4457dca4c9 Rename the ARM Jit class to ArmJit 2014-12-07 14:25:22 +01:00
Henrik Rydgard
7740caeade Buildfix the arm emitter test in the unittest. 
Also do some preparation for being able to have two JITs compiled at the same time
which may be useful in testing parts of the ARM jit on Windows.
 2014-12-07 14:12:13 +01:00
Henrik Rydgard
c2503b1406 ARM jit: Prepare for joining vrot ops 2014-12-07 11:58:19 +01:00
Henrik Rydgard
4d8db38798 Some more 2014-12-07 00:30:45 +01:00
Henrik Rydgard
ff4746cd17 Merge the rest of the old NEON branch. 2014-12-06 13:14:03 +01:00
Henrik Rydgard
e3a81f4346 x86 Jit: Basic implementation of vbfy1/2 (mostly to just cross another one off the list..) 2014-12-04 00:18:58 +01:00
Henrik Rydgard
ac772f25ff x86 JIT: Join adjacent vrot calls together to avoid redundant sin/cos calls. Add a prototype, fix minor issues. 2014-11-30 11:04:13 +01:00
Unknown W. Brackets
1064f580e4 armjit: Add proxy blocks for continuing. 2014-10-12 17:20:26 -07:00
Unknown W. Brackets
928e2adfc9 jit: Avoid applying/restoring the rounding mode. 
If the game never sets it, we can skip around syscalls, interpreter,
replacements, etc.
 2014-10-12 12:51:45 -07:00
Unknown W. Brackets
8d0dca71fe jit: Rename the rounding mode funcs to clarify. 
They apply/restore the value, set/clear is confusing.
 2014-10-12 11:35:20 -07:00
Unknown W. Brackets
4459b8f483 jit: Actually jit vmtfc/vmfvc. 
Sicne we have them and they are easy.
 2014-09-01 23:13:39 -07:00
Unknown W. Brackets
1fcbb7bbd4 armjit: Respect the rounding mode for mul/etc. 2014-08-22 00:32:01 -07:00
Sacha
6ce3765b12 Sailfish: More compatibility with SailFish OS. It also needs stddef where Maemo does. 
Set packaging by default for iOS with b.sh.
 2014-07-24 23:20:09 +10:00
Unknown W. Brackets
9efbc2694b Add an invalidate all method to the jit. 2014-06-19 01:13:06 -07:00
Unknown W. Brackets
e783627947 armjit: Use our I2R funcs on reg/reg math too. 
When one is a known immediate.  This should catch more cases, like:

ori v0, $0, 0xFFFF
and v1, v1, v0
 2014-03-14 19:15:43 -07:00
Unknown W. Brackets
8e979da0f9 armjit: Use our I2R arm optimizations. 
Should help cases of ori and andi most, but also addiu.  They will all try
to use an optimized immediate (from another nearby value) if possible.
 2014-03-14 19:15:43 -07:00
Henrik Rydgård
00c32ddadb Mostly get rid of including "Globals.h" 2013-12-30 10:17:11 +01:00
Unknown W. Brackets
438361d0bc Clean up code pointer naming for the jit. 
Now it properly identifies thunk code which is actually a decent percent
when fastmem is off at least.
 2013-12-18 23:57:39 -08:00
Henrik Rydgard
1cb7965cb1 Jit feature preparation: Introduce "proxy blocks". 
When these are invalidated, the block they point to gets invalidated too.

Will be useful to implement various types of block merging and function inlining
without affecting correctness of cache clears etc.

Also, with this commit we can now fully inline replaced functions. fabsf() boils
down to 1-2 instructions and the block continues, for example.
 2013-12-19 00:39:49 +01:00
Henrik Rydgard
2eab4aa1bf Play around with function replacement. Turned off by default of course. 2013-12-17 23:40:27 +01:00
Henrik Rydgard
2140892074 Initial preparations for ability to replace game functions with custom implementations. 
Also auto-saves hashmap additions and reapplies the hashmap on function
rename so that if you rename a function that exists in several copies
they will all be labelled.

Note that actual function replacement is not activated yet.
 2013-12-17 12:27:20 +01:00
Henrik Rydgard
2d8429ac48 Assorted cleanup in the MIPS emulation 2013-12-10 13:15:16 +01:00
Unknown W. Brackets
5d2ff64252 Support for modified jit-enabled VerySleepy. 
This allows profiling the jit.  Should have zero perf impact when not
in use, since it's entirely triggered by VerySleepy.
 2013-11-30 19:20:21 -08:00
Henrik Rydgard
ab3037112f Some scaffolding for a future VFPU-on-NEON implementation 2013-11-19 21:41:48 +01:00
Henrik Rydgard
5bb3824dcf Implement vocp on ARM and x86. 2013-11-19 21:41:47 +01:00
Unknown W. Brackets
359110f010 x86/armjit: Add jump following (off by default.) 
Inlines function calls up to a certain extent.  Allows us to get
immediates all the way to a syscall, for example, usually.

Not sure if faster.
 2013-11-10 21:59:49 -08:00
Unknown W. Brackets
aacb31bc18 armjit: Copy over (disabled) immbranch optim. 
This does a little loop unrolling.  Costs a bit more cache space, but
avoids flushing regs for longer.

Not enabled.
 2013-11-10 21:59:48 -08:00
Unknown W. Brackets
455a7e090d Compile the cache instruction to nothing. 
Was showing up in a few profiles, does nothing currently.
 2013-11-10 14:38:10 -08:00
Unknown W. Brackets
06c8cb9174 armjit: Do shifts with imms as much as possible. 
This may even make an imm operand2 safe that wasn't before.
 2013-11-10 14:38:08 -08:00
Unknown W. Brackets
b310edc5f8 Fix typo in ARM debug build. 2013-11-09 15:58:27 -08:00
Henrik Rydgard
0a844ce98d Delete functions for vsge and vslt, these have been rolled into VecDo3 2013-11-09 19:29:52 +01:00
Unknown W. Brackets
4026944b02 armjit: Handle lwl/lwr (not pretty, though.) 2013-11-09 08:42:30 -08:00
Unknown W. Brackets
cb3bb73148 armjit: Improve GPR typesafety. 2013-11-09 08:24:15 -08:00
Henrik Rydgard
502f772856 Add experimental mode to cache pointers in the arm jit. 
Turned off for now as it needs more work but seems quite promising already.
 2013-11-09 17:15:30 +01:00
Henrik Rydgard
04451623b9 This variant didn't seem to make much difference either (see prev commit) 2013-11-09 13:06:10 +01:00
Henrik Rydgard
15bc5a8db7 Add small ARM perf experiment. Did not help on ARMv7 so turned it off. 
xsacha might want to try it on ARMv6.
 2013-11-09 12:57:07 +01:00
Unknown W. Brackets
5d46a82f43 armjit: Use a MOV for add/or with 0. 
Might skip the ALU, so might be faster.
 2013-11-08 11:41:57 -08:00
Unknown W. Brackets
376918c408 armjit: Reverse add t0, N, t1 to preserve imm. 2013-11-08 11:41:55 -08:00
Henrik Rydgard
309f904c0c Extract JitState into its own header (arm/x86) 2013-11-08 18:51:52 +01:00