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775 commits

Author SHA1 Message Date
Henrik Rydgård
0f080aeaaa Merge pull request #492 from unknownbrackets/jit-minor 
ALU jit optimizations
 2013-01-25 01:01:34 -08:00
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a7c6f46829 Optimize and/or 0 to just a mov in x86 jit. 2013-01-25 00:25:40 -08:00
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ab9bea068c Jit reg+reg compile time, and avoid flushing EDX. 2013-01-25 00:16:55 -08:00
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ce5f393fb8 Hit immediates in the ALU better and more simply. 2013-01-25 00:16:55 -08:00
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d1909a1581 Add a quick disable define for nice delay slots. 2013-01-24 19:11:03 -08:00
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75cbe18afc Simplify nice delay slot detect, and yes for noop. 
NOOP seems very common so this should already benefit speed a bit.
 2013-01-24 08:29:32 -08:00
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2eba209f64 Move around the jit nice delay slot logic. 
Nice delay slots don't not save flags, they run before the CMP.
 2013-01-24 07:31:51 -08:00
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3444fc8981 Avoid some memory writes on jr. 
Should improve tight mips function loops a bit.
 2013-01-24 01:23:50 -08:00
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c1757ee166 Check downcount in jit after a syscall. 2013-01-23 22:25:35 -08:00
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0e33923844 Belt and suspenders check for branch ops. 2013-01-22 08:11:37 -08:00
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c324983340 Make the jit support bltzal and friends. 
Fixes problems with jit in games.  Android changes completely untested.
 2013-01-22 08:04:01 -08:00
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a9d0390426 Adjust downcount before syscalls, not after. 
This makes jit slightly slower for syscalls, but it's minor and makes
sure jit and interpreter timing are determistically the same.
 2013-01-21 22:57:53 -08:00
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566b7a0910 A branch was missing inDelaySlot, refactor it. 2013-01-21 22:45:07 -08:00
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c897e6446a Don't over decr downcount when hitting a jit bp. 2013-01-21 19:41:12 -08:00
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8438371941 Read memory in the jit dispatcher same as lw. 
Just for consistency.  One less op, maybe faster, probably same.
 2013-01-21 17:51:14 -08:00
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1485b0865c Improve the speed of branch debugging a bit. 2013-01-20 19:48:55 -08:00
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dd69694302 Add some optional logging to debug jit branching. 2013-01-20 19:48:55 -08:00
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776eb8ab2e Simplify CompileDelaySlot(). 2013-01-20 19:48:54 -08:00
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df06bb5624 Add some checks to make sure ZERO is never set. 2013-01-20 19:48:53 -08:00
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a43078ab68 Same optimization for FPU load / store. 2013-01-20 13:16:41 -08:00
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f5963df0dc Optimize write to a single x64 op too. 2013-01-20 13:06:19 -08:00
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e8dc99328a Avoid using EAX as a temporary where possible. 
All the regs should be indirect addressing compatible.  So if it's
in a reg, let's use that instead of EAX.
 2013-01-20 12:57:14 -08:00
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eaa24ee047 Use EDX as a temporary for sb, and jit it. 2013-01-20 12:25:08 -08:00
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30f6a4ba87 Fix stupid stupid typo breaking slowmem jit. 2013-01-20 09:39:13 -08:00
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da22eb8adf Make swc1 and lwc1 fast even without fastmem. 2013-01-20 02:07:00 -08:00
Henrik Rydgård
2cb830510c Merge pull request #444 from unknownbrackets/jit-minor 
Don't muck with currentMIPS->r directly in the slowmem jit
 2013-01-20 01:58:48 -08:00
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53600161ba Don't write anything to a bad static pointer. 
Not sure what came over me...
 2013-01-20 00:19:18 -08:00
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385417effe Log jit misses at runtime instead of compile time. 
Really, it could be very different after all... this shouldn't be
all that slow, I guess.
 2013-01-19 20:11:17 -08:00
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75a3872923 Log missed jit ops for poor man profiling. 2013-01-19 19:58:25 -08:00
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e78223d2c0 Since flipping the op is easy, also do lb/lh. 2013-01-19 16:25:57 -08:00
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5e8f1917ee Fix 64-bit memory dereferencing. 2013-01-19 16:25:57 -08:00
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90e6f0b7df Optimize static memory read/writes in jit as well. 
Like the arm jit does.
 2013-01-19 16:25:56 -08:00
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c64966c16e Oops, lost the CONDITIONAL_DISABLE. 2013-01-19 16:25:56 -08:00
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37fb64ac83 Fast path scratchpad too, shouldn't be expensive. 2013-01-19 11:11:45 -08:00
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72e547420d Refactor jit slowmem, add lbu to jit since easy. 2013-01-19 11:11:45 -08:00
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5305017fc3 Properly save registers before the slowmem call. 2013-01-19 11:11:44 -08:00
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f1295f6262 Don't muck with currentMIPS->r in the slowmem jit. 2013-01-19 11:11:44 -08:00
Henrik Rydgard
229d4e9f32 Buildfix 2013-01-19 13:10:52 +01:00
Henrik Rydgård
c20cef2399 Merge pull request #440 from unknownbrackets/jit-minor 
Micro optimizations to x86 jit mem when fastmem is off
 2013-01-19 02:04:34 -08:00
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2ad77aa9c8 Gotta flush before the call, too. 2013-01-19 01:53:11 -08:00
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09422d5adb Avoid a func if possible when fastmem is off. 2013-01-19 01:02:47 -08:00
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bc75b68c36 Also jit sh and lhu, which are pretty common ops. 2013-01-18 23:10:51 -08:00
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d5ae85201c Optimize sw/lw even under safe memory. 
They're very common instructions, so shaving cycles helps.
 2013-01-18 23:10:50 -08:00
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11c5cdfdb0 Refactor out all the CheckJitBreakpoint()s. 
Ah, much cleaner.
 2013-01-18 21:33:23 -08:00
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5080285e54 Add breakpoints for delay slots. 
Wanted to do this in CompileAt(), darn not nice delay slots.
 2013-01-18 21:12:58 -08:00
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40ae3dfe45 Correctly break at branch points in x86 jit. 2013-01-18 21:12:53 -08:00
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beac991a9e Clear jit cache when changing breakpoints. 
For now, only when paused.  I don't think clearing the cache while
running is an awesome idea.
 2013-01-18 20:12:53 -08:00
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a9293c8923 Add breakpoints to x86 jit for easier debugging. 
They should be really fast so leaving them on in release.
 2013-01-18 20:10:37 -08:00
Henrik Rydgard
674911ddba Move downcount into MIPSState for efficiency, enable block linking. 
On ARM JIT we can now reach it through the cpu context reg.
 2013-01-12 00:44:18 +01:00
Henrik Rydgard
ea3055322c Oops 2013-01-09 00:45:54 +01:00